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Publication detail
SEKANINA, L.
Original Title
Evolutionary hardware design (Invited Paper)
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
Since the early 1990's researchers have begun to apply evolutionary algorithms to synthesize electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. This paper surveys fundamental concepts of evolutionary hardware design. It introduces relevant search algorithms such as Cartesian genetic programming (CGP). Several case studies are presented demonstrating strength and weakness of the method. Target domains are combinational circuit synthesis where the goal is to minimize the number of gates, image filter design intended for field programmable gate arrays (FPGAs) where the goal is to obtain the quality of filtering of conventional methods for a significantly lower cost on a chip and evolution of benchmark circuits for evaluation of testability analysis methods. Evolved circuits are compared with the best-known conventional designs. FPGAs are presented as accelerators for evolutionary circuit design and circuit adaptation.
Keywords
evolvable hardware, genetic programming, field programmable gate array, logic design, image filter
Authors
RIV year
2011
Released
1. 6. 2011
Publisher
SPIE - the international society for optics and photonics
Location
Bellingham
ISBN
978-0-8194-8656-1
Book
VLSI Circuits and Systems V
Edition
Proc. of SPIE Vol. 8067
Pages from
1
Pages to
11
Pages count
URL
https://www.fit.vut.cz/research/publication/9660/
BibTex
@inproceedings{BUT76378, author="Lukáš {Sekanina}", title="Evolutionary hardware design (Invited Paper)", booktitle="VLSI Circuits and Systems V", year="2011", series="Proc. of SPIE Vol. 8067", pages="1--11", publisher="SPIE - the international society for optics and photonics", address="Bellingham", isbn="978-0-8194-8656-1", url="https://www.fit.vut.cz/research/publication/9660/" }
Documents
sekanina.pdf