Publication detail

Evolutionary Design of Collective Communications on Wormhole NoCs

JAROŠ, J. DVOŘÁK, V.

Original Title

Evolutionary Design of Collective Communications on Wormhole NoCs

Type

book chapter

Language

English

Original Abstract

This paper describes the technique of the evolutionary design aimed at scheduling of collective communications on autonomic networks on chip (ANoC). In order to avoid contention for links and associated delays, collective communications proceed in synchronized steps. A minimum number of steps is sought for the given network topology and given sets of sender and receiver nodes. The proposed technique is not only able to re-invent optimum schedules for known symmetric topologies like hypercubes, but it can find schedules even for any asymmetric, irregular, multistage and fat topologies in case of general many-to-many collective communications. In most cases, the number of steps reaches the theoretical lower bound for the given communication pattern; if it does not, non-minimum routing can provide further improvement. Optimal schedules may serve for writing high-performance communication routines for application-specific networks on chip or for the development of communication libraries in the case of general-purpose interconnection networks.

Keywords

Evolutionary design, autonomic networks on chips, wormhole switching, network topologies, collective communications

Authors

JAROŠ, J.; DVOŘÁK, V.

RIV year

2011

Released

2. 10. 2011

Publisher

CRC Press LLC

Location

London

ISBN

978-1-4398-2911-0

Book

Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification

Edition

Embedded Multi-Core Systems

Pages from

60

Pages to

94

Pages count

35

BibTex

@inbook{BUT76474,
  author="Jiří {Jaroš} and Václav {Dvořák}",
  title="Evolutionary Design of Collective Communications on Wormhole NoCs",
  booktitle="Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification",
  year="2011",
  publisher="CRC Press LLC",
  address="London",
  series="Embedded Multi-Core Systems",
  pages="60--94",
  isbn="978-1-4398-2911-0"
}