Course detail

Design of analog integrated circuits

FEKT-BNAOAcad. year: 2012/2013

Classification of integrated circuit. Aspects of design of analogue integrated circuits. Used technologies (bipolar, CMOS, BiCMOS)-their performance and comparison. Design and simulation of basic analogue integrated building blocks (current mirrors and references, amplifiers). Methodology and design rules for layout of analogue integrated circuits. Novel circuit principles - SC and SI, current- and mixed-mode circuits. Modern analogue building block of ASICs - current and voltage conveyors, current and transimpedance amplifiers, converters. Advanced compensation techniques for analogue Ic on chip level. Micromechanical analogue IC. Computer exercices focused on simulation and design of analogue functional blocks. Use of professional design system CADENCE for complex design of analogue IC (includig layout).

Language of instruction

Czech

Number of ECTS credits

6

Mode of study

Not applicable.

Guarantor

doc. Ing. Jiří Háze, Ph.D.

Department

Department of Microelectronics (UMEL)

Learning outcomes of the course unit

Students become familiar with design process of analogue integrated circuits. Lectures focused on practical design exercices (layout creating, circuit simulation etc.)

Prerequisites

The subject knowledge on the secondary school level is required.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

Requirements for completion of a course are specified by a regulation issued by the lecturer responsible for the course and updated for every.

Course curriculum

1) Classification of integrated circuit. Aspects of design of analogue integrated circuits. Used technologies (bipolar, CMOS, BiCMOS)-their performance and comparison.
2) Design and simulation of basic analogue integrated building blocks (current mirrors and references, amplifiers).
3) Methodology and design rules for layout of analogue integrated circuits.
4) Novel circuit principles - SC and SI, current- and mixed-mode circuits.
5) Modern analogue building block of ASICs - current and voltage conveyors, current and transimpedance amplifiers, converters.
6) Advanced compensation techniques for analogue Ic on chip level.
7) Micromechanical analogue IC.

Computer exercices focused on simulation and design of analogue functional blocks. Use of professional design system CADENCE for complex design of analogue IC (includig layout).

Work placements

Not applicable.

Aims

Aim of this course is make students familiar with manufacture proces of the integrated circuits, circuit design and layout of the basic blocs.

Specification of controlled education, way of implementation and compensation for absences

The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Not applicable.

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme EECC Bc. Bachelor's

    branch B-MET , 3 year of study, summer semester, elective specialised
    branch B-TLI , 2 year of study, summer semester, elective interdisciplinary
    branch B-EST , 2 year of study, summer semester, elective specialised

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, summer semester, elective specialised

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

doc. Ing. Jiří Háze, Ph.D.

Syllabus

Distribution of IC, design process, design software tools.
Technologies (bipolar, CMOS, HBiCMOS) and their performance. Technological models. Design rules.
Basic structures of the pasive devices (resistors, capacitors), performance (temperature behaviour, electrical parameters, technology impact). Layout methodology.
MOS transistor structure and behaviour. MOS transistor layout .
Current mirrors, structure description and behaviour. Design process with reference to required performance (frequency and dynamical behaviour, output resistence). Common layout techniques.
Voltage and current references for integrated circuits. Circuit design, layout.
Basic one-stage amplifier structures (CS, CD, CG). Design, compensation. Active load. Layout techniques.
Differential stage, basic structures and behaviour. Circuit design, optimalization and layout.
Basic block structure of operational amplifier, types and behaviour. Performance of the integrated opamp structure.
Design of integrated opamps, compensation techniques on chip level, layout process.
Modern trends. Current- and mixed-mode circuits. Principle, performance and comparation against klassical techniques. SC and SI principle.
VLSI blocks of modern IC. Current and voltage conveyors, opamp with current feedback, impedance converters.
Modern trends in field of integrated circuits production.

Exercise in computer lab

39 hod., compulsory

Teacher / Lecturer

doc. Ing. Vilém Kledrowetz, Ph.D.

Syllabus

Introduction. Design software tools (CADENCE, Mentor Graphics)
Design rules. Technological models of the physical devices - types and structures.
Features of using technologies. Layout correction and compensation of technology process errors.
Methodology of the passive components layout.
MOS transistor layout.
Current mirrors. Types, circuit design and layout.
References for integrated circuits. Circuit design, layout.
One-stage integrated amplifiers. Structures, circuit design, optimalisation and layout.
Differential pair. Structures, circuit design and optimalisation, layout.
Operational amplifier. Block structures. Design.
Operational amplifier. Optimalisation, compensation on the chip level, layout.
Modern structures. Current and voltage conveyors, current amplifiers.
Summary.