Course detail

Pulse and Digital Techniques

FEKT-BICTAcad. year: 2012/2013

Signal transmission in linear and nonlinear systems. Linear transmission circuits of first order. Diodes and transistors in pulse circuits. Transistor switch. Comparators and flip-flops. Combinational digital circuits, Boolean algebra. Minimization of combinational logic functions. Hazards in combinational systems. Combinational logic functions synthesis by VHDL language. Arithmetical operations. Asynchronous latches. Edge triggered flip-flops. Binary counters. State machines. Basic families of TTL and CMOS digital circuits. Programmable logical devices PLD. Implementation of digital systems in CPLD. Implementation of digital systems in FPGA.

Language of instruction

Czech

Number of ECTS credits

5

Mode of study

Not applicable.

Learning outcomes of the course unit

Knowledge of connection and function of basic pulse and digital circuits, ability to work with them in laboratory. Ability to work with computer design and simulation systems. Programming in VHDL language.

Prerequisites

The subject knowledge on the secondary school level is requested.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

To obtain the credit, all computer and laboratory exercises must be passed. Written tests are optional. Final exam is written.

Course curriculum

1. Linear transmission circuits of first order. Diodes and transistors in pulse circuits.
2. Transistor switch. Comparators and flip-flops.
3. Combinatorial digital circuits, Boolean algebra.
4. Combinatorial logic functions synthesis by VHDL language.
5. Edge triggered flip-flops.
6. Binary counters. State machines.
7. Implementation of digital systems in FPGA.

Computer exercises:
1. Design of diode former.
2. Signal transmission in linear and nonlinear systems.
3. Transistor switch.
4. Analogue comparators.
5. Flip-flops.
6. Development tool ISE.
7. Implementation of code converter.
8. Arithmetical operations.
9. SR flip-flops.
10. Binary counter.
11. State automate.

Laboratory exercises:
1. Signal transmission in RC circuits.
2. Monostable and astable flip-flop.
3. Comparing amplifier.
4. Timer 555.
5. Combinatorial circuit.
6. Sequential logical circuits.
7. Asynchronous and synchronous counter.

Work placements

Not applicable.

Aims

The aim of the course is a theoretical and practical knowledge of the most important pulse and digital subsystems.

Specification of controlled education, way of implementation and compensation for absences

The contents and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Not applicable.

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme EECC Bc. Bachelor's

    branch B-EST , 2 year of study, summer semester, compulsory

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, summer semester, compulsory

Type of course unit

 

Lecture

13 hod., optionally

Teacher / Lecturer

Syllabus

1. Signal transmission in linear and nonlinear systems.
2. Linear transmission circuits of first order. Diodes and transistors in pulse circuits.
3. Transistor switch. Comparators and flip-flops.
4. Combinational digital circuits, Boolean algebra.
5. Minimization of combinational logic functions. Hazards in combinational systems.
6. Combinational logic functions synthesis by VHDL language.
7. Arithmetical operations.
8. Asynchronous latches.
9. Edge triggered flip-flops.
10. Binary counters. State machines.
11. Basic families of TTL and CMOS digital circuits. Programmable logical devices PLD.
12. Implementation of digital systems in CPLD.
13. Implementation of digital systems in FPGA.

Exercise in computer lab

26 hod., compulsory

Teacher / Lecturer

Syllabus

1. Design of diode former.
2. Signal transmission in linear and nonlinear systems.
3. Transistor switch.
4. Analogue comparators.
5. Flip-flops.
6. Development tool ISE.
7. Implementation of code converter.
8. Arithmetical operations.
9. Arithmetical-Logic Unit.
10. SR flip-flops.
11. Binary counter.
12. State automat.

Laboratory exercise

13 hod., compulsory

Teacher / Lecturer

Syllabus

1. Signal transmission in RC circuits.
2. Monostable and astable flip-flop.
3. Comparing amplifier.
4. Timer 555.
5. Combinatory circuit.
6. Combinatory function synthesis and multiplexor.
7. Hazards in combinatory circuits.
8. Minimization of combinatory functions.
9. Sequential logical circuits.
10. Asynchronous and synchronous counter.
11. Synchronous counter synthesis.
12. Generator of variable pulses number.