Course detail

PC systems

FEKT-BSPCAcad. year: 2018/2019

The course is aimed to the personal computer architecture and peripheral communication (interrupts, DMA, serial data communication, communication buses and graphical cards). The descriptions of the devices are aimed to designing of user peripheral and user interfaces (signal measurement, data analyses). As a peripheral devices are used FPGAs and signal processors.

Language of instruction

Czech

Number of ECTS credits

6

Mode of study

Not applicable.

Guarantor

Ing. Soběslav Valach

Department

Department of Control and Instrumentation (UAMT)

Learning outcomes of the course unit

- able to design a simple PC peripheral
- synthesizes logical devices and networks
- describes ISA, PCI and PCI Express buses
- describes the functional blocks and properties of gate arrays
- describes advantages and disadvantages of implementation of DSP and FPGA based peripherals
- discus interrupt handling mechanisms
- identifies weakness of PC’s buses and their usage

Prerequisites

The subject knowledge of programming in C language, boolean function, logic and sequential devices operation.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Techning methods include lectures and practical laboratories. Students have toparticipate on single project during the course.

Assesment methods and criteria linked to learning outcomes

Labs + projects: 50 points
Final Exam: 50 points
Requirements for completion of the course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Course curriculum

1. Introduction – course definition, examples.
2. Gate arrays.
3. Personal computer periferies.
4. Buses (ISA, PCI].
5. Buses (PCI, proprietary buses).
6. HDL I (ABEL, VHDL).
7. HDL II (VHDL examples).
8. Signal processors - introduction.
9. Signal processors - instruction set DSP.
10. Signal processors - DSP/PC communication.
11. Highspeed communication (DDR, LVDS, ExpressPCI).
12. Dynamic memory DDR SDRAM.
13. Optics fiber communication (1G Ethernet, 10G Ethernet).

Work placements

Not applicable.

Aims

The aim of the course is to inform students about PC construction on programmer level. The course allows to understand PC function as a control computer in technology processes.

Specification of controlled education, way of implementation and compensation for absences

The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Not applicable.

Recommended reading

BUDRUK S. PCI Express System Architecture. MindShare, Inc., 2013 1280 p. ISBN 13: 978-0-321-15630-3. (EN)
MUELLER S. Personal Computer. Computer Press, 2001. 869 p. ISBN 80-7226-470-2. (EN)

Classification of course in study plans

  • Programme EECC Bc. Bachelor's

    branch B-AMT , 3 year of study, summer semester, elective specialised

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, summer semester, elective specialised

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

Ing. Soběslav Valach

Syllabus

Structure of processors INTEL,I/O

Laboratory exercise

39 hod., optionally

Teacher / Lecturer

Ing. Soběslav Valach

Syllabus

Design systems SYNARIO,VIEWLOGIC.