Course detail

Hardware/Software Codesign

FIT-HSCAcad. year: 2021/2022

The course focuses on aspects of system level design. Implementation of HW/SW systems optimized according to various criteria. Behavioural and structural HW/SW system description. Basic hardware and software components and interface models. Hardware and software components synthesis. Assignment of behavioural description to given components. Design of interfaces between HW/SW components. Planning access to distributed components. Prediction and design analysis techniques regarding given constrains. HW/SW partitioning algorithms and tools. Heterogeneous computation architectures and platforms. Integrated design tools. Case studies of optimized HW/SW systems.

Language of instruction

Czech

Number of ECTS credits

5

Mode of study

Not applicable.

Learning outcomes of the course unit

Students will gain knowledge and skill in theory and techniques of automatized HW/SW co-design of computation systems optimized according to various criteria.
Theoretical background for analysis and design of HW/SW systems.

Prerequisites

Basics of system simulation and design.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Not applicable.

Assesment methods and criteria linked to learning outcomes

  • project (25 points)
  • mid exam (20 points)
  • final exam (55 points)
  • Course curriculum

    Not applicable.

    Work placements

    Not applicable.

    Aims

    The aim of the course is to gain knowledge and skills in HW/SW co-design of computing systems. The students will also learn about models of hardware and software component behavior and mutual interaction, hardware and software partitioning algorithms and techniques and assessment of the quality, and the final system synthesis and optimization according to various criteria.

    Specification of controlled education, way of implementation and compensation for absences

    The knowledge of students is examined by the mid-exam (20 points), the project (25 pints) and by the final exam. The minimal number of points, which can be obtained from the final exam, is 25 (of 55 points). Otherwise, no points will be assigned to a student. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.

    Recommended optional programme components

    Not applicable.

    Prerequisites and corequisites

    Not applicable.

    Basic literature

    D. D. Gajski, N. D. Dutt, A. C-H Wu, S. Y-L Lin: High-Level Synthesis: Introduction to Chip and System Design, Springer, 1992, ISBN-13: 978-0792391944.
    L. H. Crockett, R. A. Elliot, M. A. Enderwitz and R. W. Stewart: The Zynq Book: Embedded Processing with the ARM CortexA9 on the Xilinx Zynq-7000 All Programmable SoC, First Edition, Strathclyde Academic Media, 2014.
    De Micheli, G., Rolf, E., Wolf, W.: Readings in Hardware/Software Co-design, Morgan Kaufmann; 1. vydání, 2001, 697 s., ISBN: 1558607021.
    M. Fingeroff: High-Level Synthesis Blue Book, Xlibris US, 2010, ISBN ‎ 1450097243.
    Schaumont, P. R.: A Practical Introduction to Hardware/Software Codesign, Second Edition, Springer, 2013, ISBN 978-1-4614-3737-6 (eBook).

    Recommended reading

    Přednáškové materiály v elektronické formě.

    Classification of course in study plans

    • Programme IT-MSC-2 Master's

      branch MBI , 0 year of study, winter semester, compulsory-optional
      branch MBS , 1 year of study, winter semester, compulsory-optional
      branch MGM , 1 year of study, winter semester, compulsory
      branch MIN , 0 year of study, winter semester, compulsory-optional
      branch MIS , 0 year of study, winter semester, elective
      branch MMM , 0 year of study, winter semester, elective
      branch MPV , 1 year of study, winter semester, compulsory
      branch MSK , 1 year of study, winter semester, compulsory

    • Programme MITAI Master's

      specialization NADE , 0 year of study, winter semester, elective
      specialization NBIO , 0 year of study, winter semester, elective
      specialization NCPS , 0 year of study, winter semester, elective
      specialization NEMB , 0 year of study, winter semester, compulsory
      specialization NGRI , 0 year of study, winter semester, elective
      specialization NHPC , 0 year of study, winter semester, compulsory
      specialization NIDE , 0 year of study, winter semester, elective
      specialization NISD , 0 year of study, winter semester, elective
      specialization NMAL , 0 year of study, winter semester, elective
      specialization NMAT , 0 year of study, winter semester, elective
      specialization NNET , 0 year of study, winter semester, elective
      specialization NSEC , 0 year of study, winter semester, elective
      specialization NSEN , 0 year of study, winter semester, elective
      specialization NSPE , 0 year of study, winter semester, elective
      specialization NVER , 0 year of study, winter semester, elective
      specialization NVIZ , 0 year of study, winter semester, elective
      specialization NISY up to 2020/21 , 0 year of study, winter semester, elective
      specialization NISY , 0 year of study, winter semester, elective

    Type of course unit

     

    Lecture

    39 hod., optionally

    Teacher / Lecturer

    Syllabus

    1. System-level design methodology for embedded systems.
    2. Heterogeneous computation structures, architectures and platforms.
    3. Behavioral and structural HW/SW system description.
    4. System-level synthesis - allocation, binding and scheduling.
    5. HW structures synthesis and optimization.
    6. CAD tools for HW/SW codesign.
    7. Languages for HW/SW system description.
    8. Design estimation and analysis techniques.
    9. Low-power design techniques.
    10. Models of computation.
    11. Inter-component interfaces and communication.
    12. Partitioning algorithms and tools.
    13. System-level optimization.

    Project

    13 hod., compulsory

    Teacher / Lecturer

    Syllabus

    Individual thirteen-hour project.