Course detail

Personal Computers

FIT-ITPAcad. year: 2024/2025

The course will provide students with up-to-date information on personal computer technique. Students will acquire the information on the principles of personal computer structure, I/O buses, elementary principles of external adapter construction and buses for the communication with peripheral devices.

Language of instruction

Czech

Number of ECTS credits

Mode of study

Not applicable.

Guarantor

Ing. Marcela Zachariášová, Ph.D.

Department

Department of Computer Systems (UPSY)

Entry knowledge

Not applicable.

Rules for evaluation and completion of the course

  • Lab tutorials: 16 points.
  • Written mid-term written exam: 24 points.
  • Minimum semestral activity score is not specified.
  • Final written exam: 60 points.

Attending lab experiments, mid-term exam passing. Laboratories will be possible to be passed during the following weeks.

Aims

To provide students with the information on personal computer structure, parameters, its component structure and trends for the future.
Students will become acquainted with the principles of PC construction and certain typical peripheral devices construction. In laboratory tutorials, the attention will be paid especially to the principles of peripheral device control.

Study aids

Not applicable.

Prerequisites and corequisites

Basic literature

Not applicable.

Recommended reading


Classification of course in study plans

  • Programme BIT Bachelor's 2 year of study, summer semester, elective
  • Programme BIT Bachelor's 2 year of study, summer semester, elective

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

Ing. Marcela Zachariášová, Ph.D.

Syllabus

  1. The Development Stages of Personal Computers, Parameters, Concepts.
  2. The Development Stages of Intel Microprocessor Architectures.
  3. Scalar and Superscalar Architectures.  
  4. The Implementation of CISC and RISC Architectures in Intel Microprocessors - 1. 
  5. The Implementation of CISC and RISC Architectures in Intel Microprocessors - 2.
  6. Memory Organization, Elements, Technologies, Memory Addressing, I/O Ports Addressing. CMOS Memory.
  7. Memory Organization, Elements, Technologies, Memory Addressing, I/O Ports Addressing. CMOS Memory. 
  8. Cache Memory, its Organization and Implementation.
  9. The Principles of Peripheral Operations Control, PIO Modes, Interrupt Request, Direct Memory Access.
  10. The Development Stages of Personal Computer Buses.
  11. Centronics, Its Structure and Communication.
  12. The Principles of Personal Computer Adapter Design and Construction.
  13. The Buses for Peripheral Devices Control.

Laboratory exercise

16 hod., compulsory

Teacher / Lecturer

Ing. Marcela Zachariášová, Ph.D.

Syllabus

  • Communication on ISA bus and the use of BootROM.
  • PC Power Consumption. 
  • VGA interface, signals analysis.  
  • HDD and S.M.A.R.T. technology.
  • Communication on ISA bus and servicing the IRQ.
  • PCI System Bus and the address decoder.
  • VGA interface, FITkit platform.
  • PS/2 analysis.