Czech

Not applicable.

Knowledge of the design of analog blocks (current mirrors, operational amplifiers, comparators, current and voltage references) within the scope of the subject BPC-NAO and BPC-NAO2 and the basic skills in the Cadence design package are required. 

Presentation and defence of the technical project. 

The course aims to present the entire design procedure of complex electronic circuits on a chip, from specification to advanced simulations, including parasitic extraction from the created layout. Students will use professional design tools from Cadence, Siemens, and Synopsys for circuit design and simulation.

A graduate of the course is able to:
- based on the assignment, choose a suitable system concept and evaluate the possibilities of implementing sub-circuits in the available technology,
- work on the designed system in a team and mutually coordinate the procedure and requirements for sub-blocks,
- verify the functionality of sub-circuits using advanced analyses,
- verify the functionality and characterize the parameters of the complete system,
- design the layout of the system, extract the parasites and include their influence in the simulations.
- create technical documentation. 

Not applicable.

Not applicable.

Not applicable.

BAKER, R. Jacob. CMOS Circuit Design, Layout, and Simulation. Fourth edition. Piscataway, NJ: IEEE Press, 2019. ISBN 9781119481515.
RAZAVI, Behzad. Design of Analog CMOS Integrated Circuits. Second Edition. New York: McGraw-Hill Education, 2017. ISBN 978-0-07-252493-2.
SANSEN, Willy M. C. Analog design essentials. Dordrecht: Springer, 2006. ISBN 0-387-25746-2.