Course detail
Computers and Peripheral Devices
FEKT-MKC-NAVAcad. year: 2025/2026
Basic concepts of computer techniques, architectures, family of x86 microprocessors, addressing modes, cache memory, introduction of multiple units, MMX unit, superscalar architecture of microprocessor, SSE unit, Netburst architecture, multiprocessing and its implementations, microprocessor in the x86-64 mode, architecture of AMD64 microprocessors, DCA, Core and Core iX microarchitectures, AVX unit, Bulldozer and Piledriver microarchitecture, APU and its implementations, system memory, memory timing, synchronous DRAM memories (DDR, DDR2, DDR3), memory modules, buses, hierarchy, internal PC buses, PCI bus, AGP port, PCI-Express bus, HyperTransport and QPI interconnection, DMI, chipset, parameters and properties, chipset evolution, graphics adapter, 2D and 3D acceleration, multiprocessing and its implementation in GPU.
Language of instruction
Number of ECTS credits
Mode of study
Guarantor
Department
Entry knowledge
Rules for evaluation and completion of the course
It is obligatory to work through all computer exercises and tests to complete the course. Other forms of checked instruction are specified by a regulation issued by the guarantor of the course and updated for every academic year.
Aims
Students get a detailed overview of the hardware features of processors, particular computer components of workstations and servers based on the PC platform. Students will be able to program x86 and x86-64 compatible processors on the level of symbolic instructions using standard or vector processing units (MMX, SSE, AVX), and will become familiar with the procedures of parallel programming.
Study aids
Prerequisites and corequisites
Basic literature
Minasi, M.: PC velký průvodce hardwarem. Grada Publishing, ISBN 80-7169-667-6
Recommended reading
Classification of course in study plans
- Programme MPC-TIT Master's 1 year of study, summer semester, compulsory-optional
Type of course unit
Lecture
Teacher / Lecturer
Syllabus
2. Family of x86, 8086 and 80286 microprocessors, addressing in protected mode,
3. 32-bit x86 microprocessors, 80386, linear addressing using descriptor,
4. Cache memory, 80486, introduction of multiple units, Pentium, MMX unit,
5. Superscalar architecture of microprocessor, Pentium Pro, Pentium II, SSE unit, Pentium III,
6. Netburst architecture, Pentium IV, multiprocessing and its implementations in Pentium IV, GPR registers in x86-64 mode,
7. Architecture of AMD64 microprocessors, DCA, Core a Core iX microarchitecture, AVX unit,
8. Bulldozer and Piledriver microarchitecture, APU and its implementations,
9. System memory, principles, parameters, memory timing, types, asynchronous and synchronous DRAM memories (DDR, DDR2, DDR3), parameters and properties, memory modules,
10. Buses, parameters, types, hierarchy, internal PC buses, PCI bus, AGP port, PCI-Express bus, HyperTransport and QPI interconnection, DMI
11. Chipset, parameters and properties, types, hierarchy, chipset evolution,
12. Graphics adapter, parameters and properties, types, 2D a 3D acceleration, GPU, multiprocessing and its implementation on GPU.
Laboratory exercise
Teacher / Lecturer
Syllabus
2. Instructions and directives, source code structure in assembly language.
3. Basics of the code structuring, source code compiling, possibilities of the compiling and its utilization.
4. User interface programming in real mode, text and graphic mode, working with macros and subroutines.
5. Asynchronous serial interface programming and its implementation on PC.
6. Computer exercises test no. 1.
7. Win32 API description, introduction to assembly language programming in the Win32 API.
8. Function in assembly language and STDCALL convention, dynamic link library.
9. Math coprocessor x87, MMX programming environment, instruction set and registers.
10. SSE programming environment, instruction set and registers.
11. Multi-threading computing, applications and programming, thread synchronization in Win32 API.
12. Computer exercises test no. 2.