Course detail

VLSI Digital IC Design and VHDL

FEKT-BNDIAcad. year: 2010/2011

Digital integrated ciruits. Bipolar, CMOS and BiCMOS technologies. Standard familly IC's. ASICs, programmable devices. Basic functional blocks if digital ICs. Design and simulation tools. Electric-level and logic-level simulation.
Placement and routing, padding. VHDL. New principles of IC design and manufacturing. Manufacturing test and diagnosis, testability. Micromechanical structures. Economical aspects of design and production.

Language of instruction

Czech

Number of ECTS credits

6

Mode of study

Not applicable.

Guarantor

doc. Ing. Lukáš Fujcik, Ph.D.

Department

Department of Microelectronics (UMEL)

Learning outcomes of the course unit

Knowledge of digital integrated structures, algorithmes and practical aspects of simulation, placement and routing. Active knowledge of VHDL.

Prerequisites

The subject knowledge on the secondary school level is required.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

Requirements for completion of a course are specified by a regulation issued by the lecturer responsible for the course and updated for every.

Course curriculum

1. Combinational logic
2. Sequential logic
3. State machine
4. State machine - examples
5. Design methodology in VHDL
6. UART bus
7. SPI bus
8. Design of PS2 controller
9. Design of VGA controller
10. Xilinx IP core generator
11. Digital filter design
12. Parametrized digital design in VHDL

Work placements

Not applicable.

Aims

Basic approaches for design and simulation of digital microelectronics structures - gates, memory cells. Programmable logic devices. Synthesis and VHDL.

Specification of controlled education, way of implementation and compensation for absences

The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

číslicové systémy a jazyk VHDL, Pinker Jiří, Poupa Martin

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme EECC Bc. Bachelor's

    branch B-MET , 3 year of study, winter semester, elective specialised

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, winter semester, elective specialised

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

doc. Ing. Lukáš Fujcik, Ph.D.

Syllabus

Digital integrated ciruits.
Bipolar, CMOS and BiCMOS technologies.
Standard familly IC's.
ASICs, programmable devices.
Basic functional blocks if digital ICs.
Design and simulation tools.
Electric-level and logic-level simulation.
Placement and routing, padding.
VHDL.
New principles of IC design and manufacturing.
Manufacturing test and diagnosis, testability.
Micromechanical structures.
Economical aspects of design and production.

Exercise in computer lab

39 hod., optionally

Teacher / Lecturer

doc. Ing. Lukáš Fujcik, Ph.D.

Syllabus

Configuration of design environment, demonstration.
Electrical-level simulation.
Logic simulation, critical path.
Worst-case analysis, hasards.
Basic funtional blocks of digital ICs.
Standard logic famillies.
Programmable devices.
Layout and routing.
VHDL - structure and synopsis.
VHDL - basic static and dynamic structures.
VHDL - complex example.
Testability, design for test.
Micromechanical structures.