Course detail

Digital Signal Processors

FEKT-LSPRAcad. year: 2010/2011

Definition of digital signal processor, its differences from the other microprocessors. Generations of digital signal processors and their typical features, trends of development. Basic digital signal processor architectures. Freescale fixed-point digital signal processors. Processor core and the sum of peripherals. Memory mapping. Development tools. Instruction set and the way it is applied. Connection with programming in the C-language. Canonic and non-canonic structures for implementing type IIR and FIR digital filters on digital signal processor. Adaptive LMS algorithm and its implementation. Generation of harmonic signal and harmonic analysis, Goertzel's algorithm, structure of FFT algorithm and its types. Floating-point digital signal processors and their distinguishing features. IEEE-754 Standard, fixed- and floating-point number formats. Real-time processing. VLIW architecture.

Language of instruction

Czech

Number of ECTS credits

6

Mode of study

Not applicable.

Learning outcomes of the course unit

The student will be able to design and adapt algorithms of digital signal processing for implementation on digital signal processor. He will be familiar with basic architectures of digital signal processors, their properties, and their employment in practical applications.

Prerequisites

The subject knowledge on the digital signal processing and the microprocessor technology is requested.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

solution of the seven homeworks 40 marks
written examination 60 marks

Course curriculum

1. Generations of digital signal processors, common properties of digital signal processors, von Neumann's architecture, Harvard architecture, parallel processing.
2. Fixed-point and floating-point representations, representations of negative numbers, properties of fixed-point digital signal processors.
3. Architecture of digital signal processors by Freescale, data arithmetic logic unit, registers, specific instructions.
4. Address generation unit, modulo addressing mode, bit-reverse addrressing mode.
5. Program Controller, instruction pipeline, hardware cycles.
6. Program structure and writing in assembler.
7. Program structure and writing in C language, intrinsic functions, pragma directives, integrated development environment.
8. Quantization effects on digital filters characteristics, limit cycles, optimization of digital filters in digital signal processors.
9. FIR and IIR digital filters implementation in digital signal processors.
10. Generation of harmonic signals and harmonic analysis, Goertzel algorithm, implementation of fast Fourier transform.
11. On-chip peripherials, DMA controller, interrupt controller.
12. External buses, external memory interface.
13. Floating-point digital signal processors. VLIW and VLES architecture.

Work placements

Not applicable.

Aims

To deepen the basic knowledge of digital signal processing in particular the practical experience of real-time implementation of methods in fixed-point processor, and to supplement knowledge of microprocessor technology to the specific characteristics of digital signal processor architectures and specific techniques of their programming.

Specification of controlled education, way of implementation and compensation for absences

Tutorials are not duly
Computer exercise are duly
Surrender of separate tasks is duly

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Smékal, Z., Sysel, P. Signálové procesory. 1. vydání. Praha: Sdělovací technika, 2006. 283 s. ISBN 80-86645-08-8 (CS)

Recommended reading

SMÉKAL, Z., VÍCH, R.: Signal Processing on Digital Signal Processors (Zpracování signálů se signálovými procesory). Radix spol. s.r.o, Praha 1998. ISBN 80-86031-18-7 (In Czech) (CS)

Classification of course in study plans

  • Programme EEKR-ML Master's

    branch ML-SVE , 1 year of study, winter semester, elective interdisciplinary
    branch ML-TIT , 2 year of study, winter semester, elective specialised
    branch ML-EST , 2 year of study, winter semester, elective specialised
    branch ML-BEI , 2 year of study, winter semester, elective interdisciplinary

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, winter semester, elective specialised

Type of course unit

 

Lecture

39 hod., optionally

Teacher / Lecturer

Syllabus

1. Definition of digital signal processor, features that distinguish it from the other microprocessors. Generations of digital signal processors , their outstanding features, trends of development. Basic architectures of digital signal processors: von Neuman and Harvard architectures, type LIW and VLIW architectures, parallel systems.
2. Freescale fixed-point digital signal processors. Processor core and the sum of peripherals. Storage mapping. Development tools. Instruction file and the way it is applied. Basic types of operations, pipelining, macro-commands and subprograms. Connection with programming in the C-language. Integer and fraction formats expressed in the ALU unit and in the memory. Saturation arithmetic, rounding. Addressing unit modes, modulo and reverse-bit addressing.
3. Canonic and non-canonic structures for the implementation of type IIR and FIR filters on digital signal processor. Description via signal flow graphs, Mason's rule. Introduction of initial conditions, connection with implementation. Effect of initial conditions on total response. Adaptive filtering on digital signal processor. Type LMS algorithm and its implementation. Example of application.
4. Generation of harmonic signal and harmonic analysis. Goertzel's algorithm. Structure of FFT algorithm and its types. Adapting the FFT algorithm for implementation on digital signal processor. Real-time spectral analysis with FFT on digital signal processor. Power spectral desnity and its calculation.
5. Peripherals of digital signal processor, co-processors, direct access to memory, structure of control unit, interrupt, type DO cycle, stack, on-chip emulation, JTAG. Floating-point digital signal processors and their distinctive features. IEEE-754 Standard, formats of fixed- and floating-point numbers. Subdividing the ALU unit into several parts. Examples of application.

Laboratory exercise

26 hod., compulsory

Teacher / Lecturer

Syllabus

1. CodeWarrior Development Studio, basic assembler directives. Fixed-point arithmetic, multiplication, saturation, rounding. Core of 56F8367 digital signal processor, examples of using core registers. Implementation of polynomial functions.
2. Hardware cycles DO, implementation of FIR digital filters. Implementation of IIR digital filters.