Přístupnostní navigace
E-přihláška
Vyhledávání Vyhledat Zavřít
Detail publikace
NIKL, V.
Originální název
High Performance Computing on Low Power Devices
Typ
článek ve sborníku mimo WoS a Scopus
Jazyk
angličtina
Originální abstrakt
Nowadays, the power efficiency of modern processors is becoming more and more important next to the overall performance itself. Many programming tasks and problems do not scale very well with higher number of cores due to being memory or communication bound, therefore it is often not beneficial to use faster chips to achieve better runtimes. In this case, employing slower low power processors or accelerators may be much more efficient, mainly because it is possible to get the same results using much less energy and possibly after the same amount of time, given the algorithm can scale to higher number of cores after apply-ing some adjustments fitting the low power architecture. This paper describes the benefits of using low power chips for building an HPC cluster, the group of algorithms where this approach can be useful, results achieved so far and future plans.
Klíčová slova
HPC, parallelism, low power, processor architecture, supercomputers, k-Wave toolbox, MPI, OpenMP, performance evaluation, numerical methods
Autoři
Rok RIV
2015
Vydáno
19. 6. 2015
Nakladatel
Faculty of Applied Informatics, Tomas Bata University in Zlín
Místo
Zlín
ISBN
978-80-7454-522-1
Kniha
Počítačové architektury a diagnostika 2015
Strany od
37
Strany do
41
Strany počet
5
URL
https://www.fit.vut.cz/research/publication/10929/
BibTex
@inproceedings{BUT124800, author="Vojtěch {Nikl}", title="High Performance Computing on Low Power Devices", booktitle="Počítačové architektury a diagnostika 2015", year="2015", pages="37--41", publisher="Faculty of Applied Informatics, Tomas Bata University in Zlín", address="Zlín", isbn="978-80-7454-522-1", url="https://www.fit.vut.cz/research/publication/10929/" }