Detail publikace

A Pipeline Scheduling Algorithm for High-Level Synthesis

SLLAME, A.

Originální název

A Pipeline Scheduling Algorithm for High-Level Synthesis

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Scheduling is the most important task in high-level synthesis process, while pipelining is highly important for realising high-performance digital components. This paper presents a pipeline list-based scheduling algorithm, which performs forward and backward pipelining. The forward priority function is based on incorporating some information extracted from data flow graph (DFG) structure to guide the scheduler to find near-optimal/optimal schedules quickly. The algorithm has a flexible procedure cycle, which allows designers to make efficient area-performance trade-offs by using different strategies employed. Designers can choose between doing forward / backward pipelining with or without resource sharing combined with clock cycle selection, pipe stage delay determination. Experimental results with standard benchmarks show the effectiveness of the proposed algorithm.

Klíčová slova

pipelines, algorithms, synthesis, architecture, computer-aided design.

Autoři

SLLAME, A.

Rok RIV

2003

Vydáno

17. 2. 2003

Nakladatel

Elsevier Science

Místo

Ostrava

ISBN

0-08-044130-0

Kniha

Proc. of IFAC Workshop on Programmable Devices and Systems Conference

Strany od

178

Strany do

183

Strany počet

6

BibTex

@inproceedings{BUT13786,
  author="Azeddien {Sllame M.}",
  title="A Pipeline Scheduling Algorithm for High-Level Synthesis",
  booktitle="Proc. of IFAC Workshop on Programmable Devices and Systems Conference",
  year="2003",
  pages="178--183",
  publisher="Elsevier Science",
  address="Ostrava",
  isbn="0-08-044130-0"
}