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MIKA, D. KOTÁSEK, Z.
Originální název
The Test Controller Model Based on The Timed Automaton
Typ
článek ve sborníku mimo WoS a Scopus
Jazyk
angličtina
Originální abstrakt
In the paper the process of the test controller model design and synthesis on Register Transfer Level (RTL) is described. The principles of test application to circuit element by the test controller model is discussed. The problem of I-path is explained. The formal tool - the timed automaton - is used as a suitable tool for test controller model. In the end of paper there is a simple example of timed automaton, which represents a model of particular behavior of the test controller.
Klíčová slova
Register Transfer Level (RTL), Circuit Under Test (CUT), Test Controller Model
Autoři
MIKA, D.; KOTÁSEK, Z.
Rok RIV
2003
Vydáno
28. 4. 2003
Místo
Ostrava
ISBN
80-85988-86-0
Kniha
Proceedings of 37th International Conference MOSIS´03 Modelling and Simulation of Systems
Strany od
107
Strany do
114
Strany počet
8
BibTex
@inproceedings{BUT13967, author="Daniel {Mika} and Zdeněk {Kotásek}", title="The Test Controller Model Based on The Timed Automaton", booktitle="Proceedings of 37th International Conference MOSIS´03 Modelling and Simulation of Systems", year="2003", pages="107--114", address="Ostrava", isbn="80-85988-86-0" }