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BUREŠ, F.
Originální název
Selected Methods of Specification and Verification of Industriall Application
Typ
článek ve sborníku mimo WoS a Scopus
Jazyk
angličtina
Originální abstrakt
This paper presents some formal methods for specification and verification of industrial applications (for example embedded systems) and applying those methods in frame of system design. One goal of this work is founding the major formal methods and representation potential users of such methods.
Klíčová slova
formal methods, model checking, theorem proving
Autoři
Vydáno
24. 4. 2003
Nakladatel
Faculty of Electrical Engineering and Communication BUT
Místo
Brno
ISBN
80-214-2379-X
Kniha
Proceedings of the 9th Conference and Competition STUDENT EEICT 2003
Strany od
614
Strany do
618
Strany počet
5
BibTex
@inproceedings{BUT13996, author="František {Bureš}", title="Selected Methods of Specification and Verification of Industriall Application", booktitle="Proceedings of the 9th Conference and Competition STUDENT EEICT 2003", year="2003", pages="614--618", publisher="Faculty of Electrical Engineering and Communication BUT", address="Brno", isbn="80-214-2379-X" }