Detail publikace

Instruction-level Programming Approach for Very Long Instruction Word Digital Signal Processors

FRÝZA, T. MEGO, R.

Originální název

Instruction-level Programming Approach for Very Long Instruction Word Digital Signal Processors

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

This paper is focused on the benefit of low-level programming of Gigital Signal Processors (DSP) with Very Long Instruction Word (VLIW) architecture. Scecifically, the process of hardware resources allocation which is outlined in text and proved by basic matrix benchmarks. Compare to available library functions, the proposed results decrease the number of execution cycles by tens of percent for smaller matrix dimensions and help developers to solve critical parts of their applications in the instruction-level approach.

Klíčová slova

DSP, VLIW, instruction-level, low-level, matrix, assembly, C6678

Autoři

FRÝZA, T.; MEGO, R.

Vydáno

1. 2. 2018

Místo

Batumi, Georgia

ISBN

978-1-5386-1911-7

Kniha

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2017)

Strany od

518

Strany do

521

Strany počet

4

URL

https://ieeexplore.ieee.org/document/8292060/

BibTex

@inproceedings{BUT141212,
  author="Tomáš {Frýza} and Roman {Mego}",
  title="Instruction-level Programming Approach for Very Long Instruction Word Digital Signal Processors",
  booktitle="Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2017)",
  year="2018",
  pages="518--521",
  address="Batumi, Georgia",
  doi="10.1109/ICECS.2017.8292060",
  isbn="978-1-5386-1911-7",
  url="https://ieeexplore.ieee.org/document/8292060/"
}