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PODIVÍNSKÝ, J. ČEKAN, O. KRČMA, M. BURGET, R. HRUŠKA, T. KOTÁSEK, Z.
Originální název
A Framework for Optimizing a Processor to Selected Application
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
A processor plays the main role in almost every electronics system. The use of a general purpose processor may not be profitable for a specific application, because the processor is designed for a wide set of applications. Application Specific Instruction-set Processors (ASIPs) are today applied in specific cases, where one application or a certain group of applications is performed. This paper focuses on automatic optimization of an ASIP for a given application through checking its possible configurations of key parameters (number of registers, size of caches, instruction set modification, etc.). The paper also presents designed framework which is able to optimize the given application in terms of speed, area or power consumption. The framework allows to use various optimization methods. For the processor modification, the Codasip Studio tool is used. It allows to generate all tools needed for compilation, simulation, and hardware mapping which are needed in process of ASIP design. The experiments are carried on RISC-V (Reduced Instruction Set Computing) processor described in Codasip Studio.
Klíčová slova
Processor optimization, ASIP, Codasip Studio, embedded system, RISC-V
Autoři
PODIVÍNSKÝ, J.; ČEKAN, O.; KRČMA, M.; BURGET, R.; HRUŠKA, T.; KOTÁSEK, Z.
Vydáno
14. 9. 2018
Nakladatel
IEEE Computer Society
Místo
Kazan
ISBN
978-1-5386-5710-2
Kniha
Proceedings of IEEE East-West Design & Test Symposium
Strany od
564
Strany do
574
Strany počet
11
URL
https://www.fit.vut.cz/research/publication/11689/
BibTex
@inproceedings{BUT155019, author="Jakub {Podivínský} and Ondřej {Čekan} and Martin {Krčma} and Radek {Burget} and Tomáš {Hruška} and Zdeněk {Kotásek}", title="A Framework for Optimizing a Processor to Selected Application", booktitle="Proceedings of IEEE East-West Design & Test Symposium", year="2018", pages="564--574", publisher="IEEE Computer Society", address="Kazan", doi="10.1109/EWDTS.2018.8524733", isbn="978-1-5386-5710-2", url="https://www.fit.vut.cz/research/publication/11689/" }
Dokumenty
EWDTS18_Podivinsky_et_al_SBORNIK.pdf