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Detail publikace
ŠOTNER, R. JEŘÁBEK, J. POLÁK, L. PROKOP, R. JAIKLA, W.
Originální název
A Single Parameter Voltage Adjustable Immittance Topology for Integer- and Fractional-Order Design Using Modular Active CMOS Devices
Typ
článek v časopise ve Web of Science, Jimp
Jazyk
angličtina
Originální abstrakt
A simple single parameter adjustable immittance concept designed with modular active devices, fabricated in I3T 25 0.35 um 3.3 V CMOS process of ON Semiconductor, is introduced. The proposed devices employ an integer-order capacitor and specifically designed fractional-order capacitors (sometimes called constant phase elements). The proposed active topology consists of two simple active elements, namely a linearly voltage adjustable operational transconductance amplifier and a voltage differencing unity gain voltage follower/buffer, and only two passive elements, i.e. redundancy is minimized. The designed topology offers generation of an adjustable immittance having both the capacitive and inductive character. The importance of the order as well as the value of the pseudo-capacitance for design and analyzes are shown, including all important parasitic features for estimation of expected operational bandwidth which have to be considered in the design. The operational bandwidth is determined by high values of approximants of fractional-order capacities (225, 56 and 8.8 uF /sec^1- a , where α represents the order equal to 0.25, 0.5 and 0.75, respectively). These parameters result into ranges between tens of Hz and units-tens of kHz. The adjustability of the transconductance from 70 to 700 μS by the driving voltage between 0.05 and 0.5 V offers approximately one decade change of equivalent capacitance and inductance. Laboratory-based experiments done with a fabricated prototype confirmed the theoretical presumptions.
Klíčová slova
Capacitance multiplier; CMOS; constant phase element; fractional-order; immittance generation; linear voltage adjustment; synthetic inductance
Autoři
ŠOTNER, R.; JEŘÁBEK, J.; POLÁK, L.; PROKOP, R.; JAIKLA, W.
Vydáno
17. 5. 2021
Nakladatel
IEEE
Místo
Piscataway, U.S.
ISSN
2169-3536
Periodikum
IEEE Access
Ročník
9
Číslo
5
Stát
Spojené státy americké
Strany od
73713
Strany do
73727
Strany počet
15
URL
https://ieeexplore.ieee.org/document/9432958
Plný text v Digitální knihovně
http://hdl.handle.net/11012/200358
BibTex
@article{BUT171916, author="Roman {Šotner} and Jan {Jeřábek} and Ladislav {Polák} and Roman {Prokop} and Winai {Jaikla}", title="A Single Parameter Voltage Adjustable Immittance Topology for Integer- and Fractional-Order Design Using Modular Active CMOS Devices", journal="IEEE Access", year="2021", volume="9", number="5", pages="73713--73727", doi="10.1109/ACCESS.2021.3081140", issn="2169-3536", url="https://ieeexplore.ieee.org/document/9432958" }