Detail publikace

VHDL-Based Implementation of NTT on FPGA

JEDLIČKA, P.

Originální název

VHDL-Based Implementation of NTT on FPGA

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

This paper is focused on the effective hardware-accelerated implementation of NTT (Number Theoretic Transform) and inverse NTT (NTT−1) on FPGA (Field Programmable Gate Array). The discussed implementation is intended for the use in the lattice-based cryptography schemes, e.g. CRYSTALS-Dilithium digital signature scheme which is one of the finalists of the third round in the post-quantum standardization process under the auspices of NIST (The National Institute of Standards and Technology). The implementation of NTT (NTT−1) requires 1798 (2547) Look-Up Tables (LUTs), 2532 (3889) Flip-Flops (FFs) and 48 (84) Digital Signal Processing blocks (DSPs). The latency of the design is 502 (517) clock cycles at the frequency 637 MHz on Xilinx Virtex UltraScale+ architecture which makes the presented implementation to be currently the fastest one. Regarding the inverse NTT, this is the first implementation at all.

Klíčová slova

NTT, VHDL, FPGA, Dilithium, Montgomery reduction

Autoři

JEDLIČKA, P.

Vydáno

27. 4. 2021

Nakladatel

Brno University of Technology, Faculty of Electrical Engineering and Communication

Místo

Brno

ISBN

978-80-214-5943-4

Kniha

Proceedings II of the 27th Conference STUDENT EEICT 2021 selected papers

Edice

1

Strany od

136

Strany do

140

Strany počet

5

URL

https://www.fekt.vut.cz/conf/EEICT/archiv/sborniky/EEICT_2021_sbornik_2.pdf

BibTex

@inproceedings{BUT172022,
  author="Petr {Jedlička}",
  title="VHDL-Based Implementation of NTT on FPGA",
  booktitle="Proceedings II of the 27th Conference STUDENT EEICT 2021 selected papers",
  year="2021",
  series="1",
  pages="136--140",
  publisher="Brno University of Technology, Faculty of Electrical Engineering and Communication",
  address="Brno",
  doi="10.13164/eeict.2021.136",
  isbn="978-80-214-5943-4",
  url="https://www.fekt.vut.cz/conf/EEICT/archiv/sborniky/EEICT_2021_sbornik_2.pdf"
}