Detail publikace

Reconfigurable image processing architecture with Simulink prototyping support

SCHIER, J., KOVÁŘ, B., ZEMČÍK, P., HEROUT, A., BERAN, V.

Originální název

Reconfigurable image processing architecture with Simulink prototyping support

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The contribution is focused on conversion of block schematics prepared in Simulink into a scripting language so that the output can be used for reconfiguration of the flexible architecture based on DSP and FPGA for implementation of such block schematics.

Klíčová slova

Simulink, DSP, FPGA, scripting language

Autoři

SCHIER, J., KOVÁŘ, B., ZEMČÍK, P., HEROUT, A., BERAN, V.

Vydáno

15. 11. 2005

Místo

Praha

Strany od

1

Strany do

4

Strany počet

4

BibTex

@inproceedings{BUT18056,
  author="Jan {Schier} and Bohumil {Kovář} and Pavel {Zemčík} and Adam {Herout} and Vítězslav {Beran}",
  title="Reconfigurable image processing architecture with Simulink prototyping support",
  booktitle="Sborník {"}Technical Computing 2005{"}",
  year="2005",
  pages="1--4",
  address="Praha"
}