Detail publikace

Generating Synthetic Benchmark Circuits with Predefined Testability Properties

PEČENKA, T.

Originální název

Generating Synthetic Benchmark Circuits with Predefined Testability Properties

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

The paper describes the utilization of evolutionary algorithms for automatic discovery of benchmark circuits. The main objective of the paper is to show that relatively large and complex (benchmark) circuits  with predefined testability properties can be evolved in case that only a given property (e.g. testability) is required and the function of the circuit is not considered. Fitness evaluation for the proposed algorithm is based on testability analy\-sis with linear time complexity.  During the evolution, the solutions which are refused to be synthesized by a design system are excluded from the process of developing a new generation of benchmark circuits.  The fulfilment of testability properties of generated circuits was verified by professional ATPG (Automated Test Pattern Generation) tool.

Klíčová slova

benchmark circuits, evolutionary design

Autoři

PEČENKA, T.

Rok RIV

2005

Vydáno

10. 10. 2005

Místo

Brno

Strany od

200

Strany do

209

Strany počet

10

BibTex

@inproceedings{BUT18278,
  author="Tomáš {Pečenka}",
  title="Generating Synthetic Benchmark Circuits with Predefined Testability Properties",
  booktitle="Pre-Proc. 1st Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
  year="2005",
  pages="200--209",
  address="Brno"
}