Detail publikace

Lattice-based Multisignature Optimization for RAM Constrained Devices

RICCI, S. SHAPOVAL, V. DZURENDA, P. ROENNE, P. OUPICKY, J. MALINA, L.

Originální název

Lattice-based Multisignature Optimization for RAM Constrained Devices

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

In the era of growing threats posed by the development of quantum computers, ensuring the security of electronic services has become fundamental. The ongoing standardization process led by the National Institute of Standards and Technology (NIST) emphasizes the necessity for quantum-resistant security measures. However, the implementation of Post-Quantum Cryptographic (PQC) schemes, including advanced schemes such as threshold signatures, faces challenges due to their large key sizes and high computational complexity, particularly on constrained devices. This paper introduces two microcontroller-tailored optimization approaches, focusing on enhancing the DS2 threshold signature scheme. These optimizations aim to reduce memory consumption while maintaining security strength, specifically enabling the implementation of DS2 on microcontrollers with only 192 KB of RAM. Experimental results and security analysis demonstrate the efficacy and practicality of our solution, facilitating the deployment of DS2 threshold signatures on resource-constrained microcontrollers.

Klíčová slova

Lattice-based cryptography;Dilithium;threshold signature;microcontroller;memory optimization;random access memory;RAM

Autoři

RICCI, S.; SHAPOVAL, V.; DZURENDA, P.; ROENNE, P.; OUPICKY, J.; MALINA, L.

Vydáno

30. 7. 2024

ISBN

979-8-4007-1718-5

Kniha

ARES '24: Proceedings of the 19th International Conference on Availability, Reliability and Security

Strany od

1

Strany do

10

Strany počet

10

URL

https://dl.acm.org/doi/10.1145/3664476.3670461

BibTex

@inproceedings{BUT189220,
  author="Sara {Ricci} and Vladyslav {Shapoval} and Petr {Dzurenda} and Peter {Roenne} and Jan {Oupicky} and Lukáš {Malina}",
  title="Lattice-based Multisignature Optimization for RAM Constrained Devices",
  booktitle="ARES '24: Proceedings of the 19th International Conference on Availability, Reliability and Security",
  year="2024",
  pages="1--10",
  doi="10.1145/3664476.3670461",
  isbn="979-8-4007-1718-5",
  url="https://dl.acm.org/doi/10.1145/3664476.3670461"
}