Detail publikace

CSP-based Modeling of SM Architectures

ČEJKA, R. DVOŘÁK, V.

Originální název

CSP-based Modeling of SM Architectures

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

The possibility of modeling of shared memory (SM) architectures using communicating sequential processes (CSP) is described. The CSP-based Transim tool enabled us to perform fair performance comparison of theoretical PRAM model and the message passing (MP) model on one hand and the real bus based SM systems with coherent caches on the other. Various memory update strategies, cache coherence protocols and bus arbitration strategies have been examined, such as write through/write back memory update, write invalidate/write update cache coherence protocols, and the most frequently used bus arbitration strategies (fair, priority-based, random). For comparison we have chosen parallel solution of a large system of linear equations. Performance results are presented and discussed.

Klíčová slova

Shared memory, CSP, Transim, performance comparison

Autoři

ČEJKA, R.; DVOŘÁK, V.

Vydáno

1. 1. 1999

Nakladatel

Faculty of Electrical Engineering and Informatics, University of Technology Košice

Místo

Kosice - Herlany

ISBN

80-88922-05-4

Kniha

Proceedings of conference Computer Engineering and Informatics CE&I'99

Strany od

163

Strany do

168

Strany počet

6

BibTex

@inproceedings{BUT192268,
  author="Rudolf {Čejka} and Václav {Dvořák}",
  title="CSP-based Modeling of SM Architectures",
  booktitle="Proceedings of conference Computer Engineering and Informatics CE&I'99",
  year="1999",
  pages="163--168",
  publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
  address="Kosice - Herlany",
  isbn="80-88922-05-4"
}