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Detail publikace
KOTÁSEK, Z., STRNADEL, J., PEČENKA, T.
Originální název
Methodology of Selecting Scan-Based Testability Improving Technique
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
In the paper, the solution of the problem of selecting the most optimal design-for-testability technique for register-transfer level digital circuits is demonstrated. A decision-making process that is able to solve the problem over a set of scan-based techniques is presented in the paper. The process decides among following testability improving techniques: identification of testable cores, covering of feedback loops by minimum set of scan registers, selection of registers into scan chains to achieve high level of parallelism during the test application.
Klíčová slova
design for testability, scan method, testable core
Autoři
Rok RIV
2005
Vydáno
19. 4. 2005
Nakladatel
University of West Hungary
Místo
Sopron
ISBN
963-9364-48-7
Kniha
Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop
Strany od
186
Strany do
189
Strany počet
4
URL
http://www.fit.vutbr.cz/~pecenka/pubs/2005_ddecs_scan.pdf
BibTex
@inproceedings{BUT21466, author="Zdeněk {Kotásek} and Josef {Strnadel} and Tomáš {Pečenka}", title="Methodology of Selecting Scan-Based Testability Improving Technique", booktitle="Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop", year="2005", pages="186--189", publisher="University of West Hungary", address="Sopron", isbn="963-9364-48-7", url="http://www.fit.vutbr.cz/~pecenka/pubs/2005_ddecs_scan.pdf" }