Detail publikace

Space-Time Trade-offs in SW Evaluation of Boolean Functions

DVOŘÁK, V.

Originální název

Space-Time Trade-offs in SW Evaluation of Boolean Functions

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Fast evaluation of multiple-output Boolean functions with the smallest memory footprint is often required in embedded systems. The paper describes a novel method of linked tables for representation and evaluation of Boolean functions and compares it with traditional methods; PLAs from the MCS-51 micro-controller are used for comparison. Traditional methods use masks to emulate PLA one way or another. The suggested method of linked tables is based on iterative disjunctive decomposition and leads only to a series of table look-ups. Linked tables are also shown to be equivalent to specific "in-line" decision diagrams. They proved to be most flexible in making trade-offs between performance and memory space. The method of linked tables may be quite useful for embedded microprocessor or microcontroller software as well as   for digital system simulation.

Klíčová slova

Multiple-output Boolean functions, fast sw evaluation, PLA emulation, linked tables, LUT cascades

Autoři

DVOŘÁK, V.

Rok RIV

2007

Vydáno

23. 4. 2007

Nakladatel

IEEE Computer Society

Místo

New York

ISBN

0-7695-2807-4

Kniha

Proceedings of The Second International Conference on Systems

Strany od

344

Strany do

349

Strany počet

6

URL

BibTex

@inproceedings{BUT28597,
  author="Václav {Dvořák}",
  title="Space-Time Trade-offs in SW Evaluation of Boolean Functions",
  booktitle="Proceedings of The Second International Conference on Systems",
  year="2007",
  pages="344--349",
  publisher="IEEE Computer Society",
  address="New York",
  isbn="0-7695-2807-4",
  url="https://www.fit.vut.cz/research/publication/8329/"
}

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