Přístupnostní navigace
E-přihláška
Vyhledávání Vyhledat Zavřít
Detail publikace
VAŠÍČEK, Z. SEKANINA, L.
Originální název
An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
This paper presents a new approach to the FPGA implementation of image filters which are utilized to remove the salt-and-pepper noise of high intensity (up to 70% of corrupted pixels). The proposed solution combines image filters designed by means of evolutionary algorithm with a simple human-designed preprocessing and post-processing unit. It provides the same filtering capability as a standard adaptive median filter; however, using four times less Virtex slices.
Klíčová slova
image filter, FPGA, evolutionary design
Autoři
VAŠÍČEK, Z.; SEKANINA, L.
Rok RIV
2007
Vydáno
28. 8. 2007
Nakladatel
IEEE Computer Society
Místo
Los Alamitos
ISBN
1424410606
Kniha
Proc. of 2007 International Conference on Field Programmable Logic and Applications
Strany od
216
Strany do
221
Strany počet
6
BibTex
@inproceedings{BUT28818, author="Zdeněk {Vašíček} and Lukáš {Sekanina}", title="An Area-Efficient Alternative to Adaptive Median Filtering in FPGAs", booktitle="Proc. of 2007 International Conference on Field Programmable Logic and Applications", year="2007", pages="216--221", publisher="IEEE Computer Society", address="Los Alamitos", isbn="1424410606" }