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DVOŘÁK, V. MIKUŠEK, P.
Originální název
LUT Cascade-Based Implementations of Allocators
Typ
článek ve sborníku mimo WoS a Scopus
Jazyk
angličtina
Originální abstrakt
This paper presents a new technique for iterative decomposition of multiple-output Boolean functions with an embedded heuristics to order variables. The algorithm produces a cascade of LUTs that implements the given function and simultaneously constructs a sub-optimal Multi-Terminal Binary Decision Diagram (MTBDD). The LUT cascade can be used for pipelined processing on FPGAs or at a non-traditional synthesis of large combinational and sequential circuits. On the other hand, suboptimal MTBBDs can serve as prototypes for efficient firmware implementation, especially when a micro-programmed controller that firmware runs on supports multi-way branching. A novel technique is illustrated on a practical example of the m x n wavefront allocator (m = n = 4, 20 inputs, 16 outputs). It may be quite useful as a more flexible alternative implementation of digital systems with increased testability and improved manufacturability.
Klíčová slova
LUT cascades, Multi-Terminal BDDs, iterative disjunctive decomposition, a wavefront allocator
Autoři
DVOŘÁK, V.; MIKUŠEK, P.
Rok RIV
2008
Vydáno
1. 12. 2008
Nakladatel
IEEE Computer Society
Místo
New York
ISBN
978-1-4244-2482-5
Kniha
Proc. of the 25th Convention of EEE in Israel
Strany od
85
Strany do
89
Strany počet
5
URL
https://www.fit.vut.cz/research/publication/8794/
BibTex
@inproceedings{BUT30717, author="Václav {Dvořák} and Petr {Mikušek}", title="LUT Cascade-Based Implementations of Allocators", booktitle="Proc. of the 25th Convention of EEE in Israel", year="2008", pages="85--89", publisher="IEEE Computer Society", address="New York", isbn="978-1-4244-2482-5", url="https://www.fit.vut.cz/research/publication/8794/" }