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ŠEVČÍK, B.
Originální název
Modeling and Signal Integrity Testing of Digital Potentiometers
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
This paper describes the practical results of the performance of the digital potentiometers in comparison with Spice-based macromodel for frequencies of several MHz. Verification and validation checks have been performed on the new Spice compatible macromodel developed on the basis of extensive testing of the behavior models from different reputable companies such as Maxim, Analog Devices, Intersil, etc. The real system performance conditions are tested on programmable universal active filter. Subsequently the possibilities of using chain structure are tested and a digital potentiometer with high resolution and applicable to frequencies exceeding 1MHz frequency band is created. Finally, the control software is introduced.
Klíčová slova
Digital potentiometer, chain structure, macromodels, verification, validation, I2C, SPI, Up & Down, PSpice simulation
Autoři
Rok RIV
2010
Vydáno
24. 6. 2010
ISBN
978-83-928756-3-5
Kniha
Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2010
Strany od
570
Strany do
575
Strany počet
6
BibTex
@inproceedings{BUT33635, author="Břetislav {Ševčík}", title="Modeling and Signal Integrity Testing of Digital Potentiometers", booktitle="Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2010", year="2010", pages="570--575", isbn="978-83-928756-3-5" }