Detail publikace

Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs

KOŘENEK, J. SEKANINA, L.

Originální název

Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

A specialized architecture was developed and evaluated to evolve relatively large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on the same FPGA. We evolved sorting networks up to N=28. The evolution of the largest sorting networks requires 10 hours in FPGA running at 100 MHz. The experiments were performed using COMBO6 card.

Klíčová slova

Evolution, FPGA, sorting network

Autoři

KOŘENEK, J.; SEKANINA, L.

Rok RIV

2005

Vydáno

8. 9. 2005

Nakladatel

Springer Verlag

Místo

Berlin

ISBN

978-3-540-28736-0

Kniha

Evolvable Systems: From Biology to Hardware

Edice

Lecture Notes in Computer Science

Strany od

46

Strany do

55

Strany počet

10

URL

http://www.fit.vutbr.cz/~sekanina/publ/ices05/sn.pdf

BibTex

@inproceedings{BUT33687,
  author="Jan {Kořenek} and Lukáš {Sekanina}",
  title="Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs",
  booktitle="Evolvable Systems: From Biology to Hardware",
  year="2005",
  series="Lecture Notes in Computer Science",
  volume="3637",
  pages="46--55",
  publisher="Springer Verlag",
  address="Berlin",
  isbn="978-3-540-28736-0",
  url="http://www.fit.vutbr.cz/~sekanina/publ/ices05/sn.pdf"
}