Detail publikace

On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming

FIŠER, P. SCHMIDT, J. VAŠÍČEK, Z. SEKANINA, L.

Originální název

On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Recently, it has been shown that synthesis of some circuits is quite difficult for conventional methods. In this paper we present a method of minimization of multi-level logic networks which can solve these difficult circuit instances. The synthesis problem is transformed on the search problem. A search algorithm called Cartesian genetic programming (CGP) is applied to synthesize various difficult circuits. Conventional circuit synthesis usually fails for these difficult circuits; specific synthesis processes must be employed to obtain satisfactory results. We have found that CGP is able to implicitly discover new efficient circuit structures. Thus, it is able to optimize circuits universally, regardless their structure. The circuit optimization by CGP has been found especially efficient when applied to circuits already optimized by a conventional synthesis. The total runtime is reduced, while the result quality is improved further more.

Klíčová slova

digital circuit, logic synthesis, cartesian genetic programming 

Autoři

FIŠER, P.; SCHMIDT, J.; VAŠÍČEK, Z.; SEKANINA, L.

Rok RIV

2010

Vydáno

18. 4. 2010

Nakladatel

IEEE Computer Society

Místo

Vienna

ISBN

978-1-4244-6610-8

Kniha

Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems

Strany od

346

Strany do

351

Strany počet

6

URL

https://www.fit.vut.cz/research/publication/9199/

BibTex

@inproceedings{BUT35425,
  author="Petr {Fišer} and Jan {Schmidt} and Zdeněk {Vašíček} and Lukáš {Sekanina}",
  title="On Logic Synthesis of Conventionally Hard to Synthesize Circuits Using Genetic Programming",
  booktitle="Proc. of the 13th Int. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems",
  year="2010",
  pages="346--351",
  publisher="IEEE Computer Society",
  address="Vienna",
  isbn="978-1-4244-6610-8",
  url="https://www.fit.vut.cz/research/publication/9199/"
}