Detail publikace

In-System Jitter Measurement Using FPGA

KUBÍČEK, M.

Originální název

In-System Jitter Measurement Using FPGA

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The paper describes architecture, detailed implementation and measurement results of newly developed jitter measurement device. The device is implemented using a single FPGA. Probably the biggest benefit of the proposed method is that it requires no external components, just the FPGA. As such it can be implemented into an existing receiver with an FPGA without any changes to its hardware. The new jitter measurement block was implementer and tested on a real link. Comparison with jitter measurement using an oscilloscope is given to prove its reasonable performance. Compared to previously published jitter measurement methods the module is able to monitor high frequency jitter. It is also very efficient in terms of required hardware resources.

Klíčová slova

Jitter measurement, FPGA, signal quality, confidence level.

Autoři

KUBÍČEK, M.

Rok RIV

2010

Vydáno

19. 4. 2010

Nakladatel

Department of Radio Electronics, Brno University of Technology

Místo

Brno, Česká republika, Vysoké učení technické v Brně.

ISBN

978-1-4244-6319-0

Kniha

Proceedings of 20th International Conference Radioelektronika 2010

Strany od

187

Strany do

190

Strany počet

4

BibTex

@inproceedings{BUT37151,
  author="Michal {Kubíček}",
  title="In-System Jitter Measurement Using FPGA",
  booktitle="Proceedings of 20th International Conference Radioelektronika 2010",
  year="2010",
  pages="187--190",
  publisher="Department of Radio Electronics, Brno University of Technology",
  address="Brno, Česká republika, Vysoké učení technické v Brně.",
  isbn="978-1-4244-6319-0"
}