Detail publikace

On the cascade realization of sparse logic functions

DVOŘÁK, V. MIKUŠEK, P.

Originální název

On the cascade realization of sparse logic functions

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Representation of multiple-output logic functions by Multi-Terminal Binary Decision Diagrams (MTBDDs) is studied for the useful class of sparse logic functions specified by the number of true min-terms. This paper derives upper bounds on the MTBDD width, which determine the size of look-up tables (LUTs) needed for hardware realization of these functions in FPGA logic synthesis. The obtained bounds are generalization of similar known bounds for single-output logic functions. Finally a procedure how to find the optimum mapping of MTBDD to a LUT cascade is presented and illustrated on a set of benchmarks.

Klíčová slova

Boolean functions, multi-terminal binary decision diagrams MTBDDs, LUT cascades,  area-time complexity

Autoři

DVOŘÁK, V.; MIKUŠEK, P.

Rok RIV

2011

Vydáno

14. 4. 2011

Nakladatel

IEEE Computer Society

Místo

Oulu

ISBN

978-0-7695-4494-6

Kniha

Euromicro Proceedings

Strany od

21

Strany do

28

Strany počet

8

URL

https://www.fit.vut.cz/research/publication/9562/

BibTex

@inproceedings{BUT76311,
  author="Václav {Dvořák} and Petr {Mikušek}",
  title="On the cascade realization of sparse logic functions",
  booktitle="Euromicro Proceedings",
  year="2011",
  pages="21--28",
  publisher="IEEE Computer Society",
  address="Oulu",
  isbn="978-0-7695-4494-6",
  url="https://www.fit.vut.cz/research/publication/9562/"
}

Dokumenty

PID1855801.pdf