Přístupnostní navigace
E-přihláška
Vyhledávání Vyhledat Zavřít
Detail publikace
STRNADEL, J.
Originální název
Proposal of Flexible Monitoring-Driven HW/SW Interrupt Management for Embedded COTS-Based Event-Triggered Real-Time Systems
Typ
článek ve sborníku mimo WoS a Scopus
Jazyk
angličtina
Originální abstrakt
In the paper, a concept and an early analysis of an HW/SW architecture designed to prevent the SW from both timing disturbances and interrupt overloads is outlined. The architecture is composed of an FPGA (MCU) used to run the HW (SW) part of an application. Comparing to previous approaches, novelty of the architecture can be seen in the fact it is able to adapt interrupt service rates to the actual SW load being monitored with no intrusion to the SW. According to the actual SW load it is able to buffer all interrupts and related data while the SW is highly loaded or redirect the interrupts to the MCU as soon as the SW becomes underloaded.
Klíčová slova
real time, interrupt, overload, prevention
Autoři
Vydáno
29. 11. 2011
Nakladatel
Technical University Wien
Místo
Vienna
Strany od
29
Strany do
32
Strany počet
4
URL
https://www.fit.vut.cz/research/publication/9776/
BibTex
@inproceedings{BUT76464, author="Josef {Strnadel}", title="Proposal of Flexible Monitoring-Driven HW/SW Interrupt Management for Embedded COTS-Based Event-Triggered Real-Time Systems", booktitle="Proceedings of the Work-in-Progress Session of the 32nd IEEE Real-Time Systems Symposium", year="2011", pages="29--32", publisher="Technical University Wien", address="Vienna", url="https://www.fit.vut.cz/research/publication/9776/" }