Detail publikace

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

MIČULKA, L. KOTÁSEK, Z.

Originální název

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

Klíčová slova

FPGA, reconfiguration, synchronization

Autoři

MIČULKA, L.; KOTÁSEK, Z.

Rok RIV

2012

Vydáno

20. 6. 2012

Nakladatel

IEEE Computer Society

Místo

Cesme-Izmir

ISBN

978-3-902457-33-2

Kniha

15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

Strany od

20

Strany do

21

Strany počet

2

BibTex

@inproceedings{BUT97023,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System",
  booktitle="15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
  year="2012",
  pages="20--21",
  publisher="IEEE Computer Society",
  address="Cesme-Izmir",
  isbn="978-3-902457-33-2"
}