Detail publikace

Design of the 16bit Delta Sigma Converter for Sensor Signal Processing

PAVLÍK, M. KLEDROWETZ, V. PRISTACH, M. BOHRN, M. FUJCIK, L. HÁZE, J.

Originální název

Design of the 16bit Delta Sigma Converter for Sensor Signal Processing

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The paper deals with a design of the 16-bit MASH Delta-sigma converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.

Klíčová slova

Delta-sigma modulation, MATLAB, Sensor systems and applications, Solid state circuit design, Switched capacitor circuits

Autoři

PAVLÍK, M.; KLEDROWETZ, V.; PRISTACH, M.; BOHRN, M.; FUJCIK, L.; HÁZE, J.

Rok RIV

2014

Vydáno

1. 7. 2014

Místo

Berlín

ISBN

978-80-214-4983-1

Kniha

37th Internation Conference on Telecommunications and Signal Processing

Strany od

713

Strany do

716

Strany počet

4

BibTex

@inproceedings{BUT111748,
  author="Michal {Pavlík} and Vilém {Kledrowetz} and Marián {Pristach} and Marek {Bohrn} and Lukáš {Fujcik} and Jiří {Háze}",
  title="Design of the 16bit Delta Sigma Converter for Sensor Signal Processing",
  booktitle="37th Internation Conference on Telecommunications and Signal Processing",
  year="2014",
  pages="713--716",
  address="Berlín",
  isbn="978-80-214-4983-1"
}