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Detail publikace
LOJDA, J. PODIVÍNSKÝ, J. KOTÁSEK, Z. KRČMA, M.
Originální název
Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
Some types of electronic systems are working in the environment with an increased occurrence of faults such as space, aerospace or medical systems. Faults in these systems can lead to the failure of the whole system and can cause high economical losses or endanger human health. Fault tolerance is one of the techniques, the goal of which is to avoid such situations. This paper presents an approach to fault-tolerant data-paths design that is based on the modification of High-level Synthesis (HLS) input specification. The description and evaluation of the impacts of some HLS optimization methods are demonstrated in the paper as well. Higher reliability is achieved through the modification of input description in the C++ programming language, which the HLS synthesis tools are based on. Our work targets SRAM-based FPGAs that are prone to Single Event Upsets (SEUs). For the evaluation of the proposed method we use our evaluation platform, which allows us to analyze fault tolerance properties of the Design Under Test (DUT). The evaluation platform is based on functional verification in combination with fault injection.
Klíčová slova
High Level Synthesis, Data-Path, CatapultC, Fault Tolerance, Fault-Tolerant, Robot Controller, C++
Autoři
LOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z.; KRČMA, M.
Vydáno
29. 9. 2017
Nakladatel
IEEE Computer Society
Místo
Novi Sad
ISBN
978-1-5386-3299-4
Kniha
Proceedings of IEEE East-West Design & Test Symposium
Strany od
273
Strany do
278
Strany počet
6
URL
https://www.fit.vut.cz/research/publication/11492/
BibTex
@inproceedings{BUT144464, author="Jakub {Lojda} and Jakub {Podivínský} and Zdeněk {Kotásek} and Martin {Krčma}", title="Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS", booktitle="Proceedings of IEEE East-West Design & Test Symposium", year="2017", pages="273--278", publisher="IEEE Computer Society", address="Novi Sad", doi="10.1109/EWDTS.2017.8110113", isbn="978-1-5386-3299-4", url="https://www.fit.vut.cz/research/publication/11492/" }