Detail publikace

Mapping of P4 Match Action Tables to FPGA

KEKELY, M. KOŘENEK, J.

Originální název

Mapping of P4 Match Action Tables to FPGA

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

Current networks are changing very fast. Network administrators need

more flexible and powerful tools to be able to support new protocols or services very fast. The P4 language provides new level of abstraction for flexible packet processing. Therefore, we have designed new architecture for memory efficient mapping of P4 match/action tables to FPGA. The architecture is based on DCFL algorithm and is able to balance the processing speed and available memory resources.

Klíčová slova

P4, FPGA, packet classification, match action tables

Autoři

KEKELY, M.; KOŘENEK, J.

Vydáno

4. 9. 2017

Nakladatel

Institute of Electrical and Electronics Engineers

Místo

Ghent

ISBN

978-90-90-30428-1

Kniha

Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS

Strany od

1

Strany do

2

Strany počet

2

BibTex

@inproceedings{BUT144482,
  author="Michal {Kekely} and Jan {Kořenek}",
  title="Mapping of P4 Match Action Tables to FPGA",
  booktitle="Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS",
  year="2017",
  pages="1--2",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Ghent",
  doi="10.23919/FPL.2017.8056768",
  isbn="978-90-90-30428-1"
}