Detail publikace

Formal Approach to RTL Testability Analysis

KOTÁSEK, Z. RŮŽIČKA, R. HLAVIČKA, J.

Originální název

Formal Approach to RTL Testability Analysis

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

In the paper a formal approach to the RT level testability analysis is presented. It is based on the structural analysis of the circuit under design and the classification of circuit elements. The elements are classified on the basis of their possible role during the test application. The principles known from the theory of sets and mathematical logic are utilised to define the role of registers during the test application. The principles of developing the RT level testability analysis algorithms are then presented to identify registers for partial scan and parallel paths to apply the test of the circuit.

Klíčová slova

RTL testability analysis

Autoři

KOTÁSEK, Z.; RŮŽIČKA, R.; HLAVIČKA, J.

Vydáno

1. 1. 2000

Nakladatel

unknown

Místo

Rio de Janeiro

Strany od

98

Strany do

103

Strany počet

6

BibTex

@inproceedings{BUT191916,
  author="Zdeněk {Kotásek} and Richard {Růžička} and Jan {Hlavička}",
  title="Formal Approach to RTL Testability Analysis",
  booktitle="sborník konference IEEE LATW 2000",
  year="2000",
  pages="98--103",
  publisher="unknown",
  address="Rio de Janeiro"
}