Detail publikace

A Choice of SM/DM Parallel ANN Implementation for Embedded Applications

DVOŘÁK, V. ČEJKA, R.

Originální název

A Choice of SM/DM Parallel ANN Implementation for Embedded Applications

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

This paper examines implementations of a multi-layer perceptron (MLP) on bus-based shared memory (SM) and on distributed memory (DM) multiprocessor systems. The goal has been to optimize HW and SW architectures in order to obtain the fastest response possible. Prototyping parallel MLP algorithms for up to 8 processing nodes with the DM as well as SM memory was done using CSP-based TRANSIM tool. The results of prototyping MLPs of different sizes on various number of processing nodes demonstrate the feasible speedups, efficiency and time responses for the given CPU speed, link speed or bus bandwidth.

Klíčová slova

Multi-layer perceptron, shared and distributed memory, modeling, communicating sequential processes

Autoři

DVOŘÁK, V.; ČEJKA, R.

Vydáno

1. 1. 2000

Nakladatel

IEEE Computer Society Press

Místo

Edinburgh, Scotland

ISBN

0-7695-604-6

Kniha

Proceedings of the 7th IEEE International Conference on ECBS

Strany od

18

Strany do

23

Strany počet

6

BibTex

@inproceedings{BUT192344,
  author="Václav {Dvořák} and Rudolf {Čejka}",
  title="A Choice of SM/DM Parallel ANN Implementation for Embedded Applications",
  booktitle="Proceedings of the 7th IEEE International Conference on ECBS",
  year="2000",
  pages="18--23",
  publisher="IEEE Computer Society Press",
  address="Edinburgh, Scotland",
  isbn="0-7695-604-6"
}