Přístupnostní navigace
E-přihláška
Vyhledávání Vyhledat Zavřít
Detail publikace
PEČENKA, T. KOTÁSEK, Z.
Originální název
I-path Scheduling Algorithm for RT Level Circuits
Typ
článek ve sborníku ve WoS nebo Scopus
Jazyk
angličtina
Originální abstrakt
In the paper, a new approach for scheduling i-paths in Register Transfer (RT) level circuits is presented. The proposed algorithm is able to schedule i-paths not only in circuit structure, but also in time. At the beginning, the formal model for modelling data-path of structurally described RT level circuits is defined. This model is then used to define the i-path concept. The main part of the paper is devoted to introduce a method for i-path scheduling. The method is able to monitor component utilization in time and it is able to detect and solve conflicts between i-paths.
Klíčová slova
i-path, scheduling, backtracking
Autoři
PEČENKA, T.; KOTÁSEK, Z.
Rok RIV
2006
Vydáno
27. 10. 2006
Místo
Mikulov
ISBN
80-214-3287-X
Kniha
MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Strany od
174
Strany do
181
Strany počet
8
BibTex
@inproceedings{BUT22284, author="Tomáš {Pečenka} and Zdeněk {Kotásek}", title="I-path Scheduling Algorithm for RT Level Circuits", booktitle="MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science", year="2006", pages="174--181", address="Mikulov", isbn="80-214-3287-X" }