Detail publikace

Self-test RSD A/D COnverter

VEČEŘA, I., VRBA, R.

Originální název

Self-test RSD A/D COnverter

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

Current mode enables ADC operation down to 3V suitable for battery powered applications. Pipelined SC ADC is designed in 0.6um BiCMOS. Modified redundant-sign-digit conventional-restoring algorithm is implemented. The system integrates band-gap reference and independent supervisory circuit witn 1%accuracy. By changing from pipeline conversion to cycling mode, less power dissipation is obtained at the expense of conversion time. Large fault coverage can be reached if creating proper design-for-test. ADC is prepared to meet 1451.2 specifications. The developed models were utilized and SPICE simulations performed.

Klíčová slova

current mode, A/D converter, redundant-sign-digit, test

Autoři

VEČEŘA, I., VRBA, R.

Rok RIV

2002

Vydáno

1. 1. 2002

Nakladatel

Vysoké učení technické v Brně

Místo

Brno

ISBN

80-214-2180-0

Kniha

ELECTRONIC DEVICES AND SYSTEMS 02 - PROCEEDINGS

Strany od

250

Strany do

254

Strany počet

5

BibTex

@inproceedings{BUT4956,
  author="Ivo {Večeřa} and Radimír {Vrba}",
  title="Self-test RSD A/D COnverter",
  booktitle="ELECTRONIC DEVICES AND SYSTEMS 02 - PROCEEDINGS",
  year="2002",
  pages="5",
  publisher="Vysoké učení technické v Brně",
  address="Brno",
  isbn="80-214-2180-0"
}