Detail publikace

A 12-bit second order sigma-delta modulator design in 0.7 um CMOS technology

KLEDROWETZ, V. PAVLÍK, M. HÁZE, J. FUJCIK, L. PROKOP, R.

Originální název

A 12-bit second order sigma-delta modulator design in 0.7 um CMOS technology

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

The presented work deals with design of the sigma-delta modulator in CMOS I2100 0,7 um technology. This modulator is designed using the switched capacitor technique (SC). For offset compensation of operational amplifiers (opamps) each integrator uses correlated double sampling technique (CDS), which minimize impact of offset of opamps. The sigma-delta modulator is part of the system for signal processing from sensor applications. Requirements for this converter were resolution 12-bits, voltage range 4 V, common mode voltage 2,5 V, +- 2 V input signal amplitude, bandwidth of a processed signal 5 kHz. Second order structure CIDIDF (Cascaded Integrator with Distributed Input and Distributed Feedback) was chosen.

Klíčová slova

Sigma-delta modulator, SC technique, CDS technique, operational amplifier

Autoři

KLEDROWETZ, V.; PAVLÍK, M.; HÁZE, J.; FUJCIK, L.; PROKOP, R.

Rok RIV

2012

Vydáno

28. 6. 2012

Nakladatel

VUT Brno

Místo

Brno

ISBN

978-80-214-4539-0

Kniha

IMAPS CS International Conference 2012

Edice

1

Číslo edice

1

Strany od

208

Strany do

213

Strany počet

5

BibTex

@inproceedings{BUT93602,
  author="Vilém {Kledrowetz} and Michal {Pavlík} and Jiří {Háze} and Lukáš {Fujcik} and Roman {Prokop}",
  title="A 12-bit second order sigma-delta modulator design in 0.7 um CMOS technology",
  booktitle="IMAPS CS International Conference 2012",
  year="2012",
  series="1",
  number="1",
  pages="208--213",
  publisher="VUT Brno",
  address="Brno",
  isbn="978-80-214-4539-0"
}