doc. Ing.
Lukáš Fujcik
Ph.D.
FEEC, UMEL – Associate professor
+420 54114 6133
fujcik@vut.cz
Teaching
Consulting hours
Thursday, 10:00-11:00, T10/N 6.16 (Technická 10, Brno 61600)
Guaranteed programmes
| MPA-MEL | Microelectronics full-time study, English, Ing., 2 years, FEEC, |
| MPC-MEL | Microelectronics full-time study, Czech, Ing., 2 years, FEEC, |
| MPAD-MEL | Microelectronics (Double-Degree) full-time study, English, Ing., 2 years, FEEC, |
| DPC-MET | Microelectronics and technology full-time study, Czech, Ph.D., 4 years, FEEC, |
| DPA-MET | Microelectronics and Technology full-time study, English, Ph.D., 4 years, FEEC, |
| DKC-MET | Microelectronics and technology combined study, Czech, Ph.D., 4 years, FEEC, |
| DKA-MET | Microelectronics and Technology combined study, English, Ph.D., 4 years, FEEC, |
* Valid data for academic year 2024/2025
Guaranteed courses
| BPC-DIO | Digital Circuits Czech, summer, FEEC, UMEL |
| BKC-DIO | Digital Circuits Czech, summer, FEEC, UMEL |
| BPA-NDI | Digital Integrated Circuits Design English, winter, FEEC, UMEL |
| MPA-NDO | Methods of Digital Integrated Circuits Design English, winter, FEEC, UMEL |
| MPC-NDO | Methods of Digital Integrated Circuits Design Czech, winter, FEEC, UMEL |
| BPC-NDI | VLSI Digital Integrated Circuits Design and VHDL Czech, winter, FEEC, UMEL |
| BKC-NDI | VLSI Digital Integrated Circuits Design and VHDL Czech, winter, FEEC, UMEL |
* Valid data for academic year 2024/2025
Lectured courses
| BPC-DIO | Digital Circuits Laboratory exercise, Lecture, Czech, summer, FEEC, UMEL |
| BPC-NDI | VLSI Digital Integrated Circuits Design and VHDL Exercise in computer lab, Lecture, Czech, winter, FEEC, UMEL |
* Valid data for academic year 2024/2025