Ing.

Petr Kadaňka

FEEC, UMEL – Researcher

kadanka@vut.cz

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Ing. Petr Kadaňka

Teaching

Lectured courses

MPC-AIOAnalogue Integrated Circuits
Lecture, Czech, summer, FEEC, UMEL
MPC-NAIMethods of Analog Integrated Circuits Design
Lecture, Czech, winter, FEEC, UMEL

* Valid data for academic year 2024/2025