Evoluční návrh obvodů je metoda, která používá biologií inspirované prohledávací algoritmy pro syntézu a optimalizaci elektronických obvodů. Ačkoliv evoluční návrh umožnil získat mnoho zajímavých výsledků, nemožnost dobré škálovatelnosti zůstává hlavní nevýhodou metody. V tomto projektu navrhujeme a obhajujeme nové přístupy k evolučnímu návrhu obvodů, které umožní eliminovat problém škálovatelnosti a dovolí vytvářet a optimalizovat složité číslicové obvody a adaptivní hardware v programovatelných hradlových polích (FPGA). Navrhovaný projekt předpokládá následující výsledky: (1) Nové algoritmy pro ověřování funkční ekvivalence, které umožní urychlit výpočet fitness. (2) Nové vícekriteriální a koevoluční algoritmy pro evoluční návrh. (3) Rutinní návrh a optimalizace složitých číslicových obvodů pomocí navržených metod. (4) Nové architektury pro vyvíjející se a adaptivní systémy implementované v FPGA.

Description in English
The evolutionary circuit design is the use of bio-inspired search algorithms for automated synthesis and optimization of electronic circuits. Although many interesting results have been obtained using the evolutionary design, the scalability problem is still considered as the most significant problem of the method. In this project, we propose and advocate new approaches to evolutionary circuit design that will enable us to eliminate the scalability problem and thus construct and optimize complex digital circuits and adaptive hardware systems in field programmable gate arrays (FPGA). The following results are projected: (1) New functional equivalence checking algorithms for accelerating the fitness calculation. (2) New multiobjective and co-evolutionary design algorithms. (3) Routine design and optimization of complex circuits by means of the proposed tools. (4) New architectures of FPGA-based evolvable hardware systems. 

Keywords
Evoluční návrh obvodů, evoluční hardware, programovatelná hradlová pole, koevoluce

Key words in English
Evolutionary circuit design, evolvable hardware, field programmable gate array, co-evolution

GA14-04197S

Czech

Sekanina Lukáš, prof. Ing., Ph.D. - principal person responsible
Bidlo Michal, doc. Ing., Ph.D. - fellow researcher
Dobai Roland, Ing., Ph.D. - fellow researcher
Drahošová Michaela, Ing., Ph.D. - fellow researcher
Dvořák Milan, Ing. - fellow researcher
Grochol David, Ing., Ph.D. - fellow researcher
Hrbáček Radek, Ing., Ph.D. - fellow researcher
Minařík Miloš, Ing., Ph.D. - fellow researcher
Mrázek Vojtěch, Ing., Ph.D. - fellow researcher
Petrlík Jiří, Ing., Ph.D. - fellow researcher
Vašíček Zdeněk, doc. Ing., Ph.D. - fellow researcher

Department of Computer Systems
- responsible department (3.4.2013 - not assigned)
Evolvable Hardware Research Group
- internal (3.4.2013 - 31.12.2016)
Department of Computer Systems
- beneficiary (3.4.2013 - 31.12.2016)

SEKANINA, L.; VAŠÍČEK, Z. Genetic Improvement for Approximate Computing. 2nd Workshop on Approximate Computing (WAPCO 2016). Prague: 2016. p. 1-2.
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SEKANINA, L.; VAŠÍČEK, Z. Evolutionary Computing in Approximate Circuit Design and Optimization. 1st Workshop on Approximate Computing (WAPCO 2015). Amsterdam: 2015. p. 1-6.
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VAŠÍČEK, Z.; MRÁZEK, V. Trading between Quality and Non-functional Properties of Median Filter in Embedded Systems. Genetic Programming and Evolvable Machines, 2017, vol. 18, no. 1, p. 45-82. ISSN: 1389-2576.
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MRÁZEK, V.; SARWAR, S.; SEKANINA, L.; VAŠÍČEK, Z.; ROY, K. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016. p. 811-817. ISBN: 978-1-4503-4466-1.
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BIDLO, M. On Routine Evolution of Complex Cellular Automata. IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, 2016, vol. 20, no. 5, p. 742-754. ISSN: 1089-778X.
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BIDLO, M. Evolution of Complex Emergent Behaviour in Multi-State Cellular Automata. In Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2016. p. 157-158. ISBN: 978-1-4503-4323-7.
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BIDLO, M. Evolution of Generic Square Calculations in Cellular Automata. In Proceedings of the 8th International Joint Conference on Computational Intelligence - Volume 3: ECTA. Porto: SciTePress - Science and Technology Publications, 2016. p. 94-102. ISBN: 978-989-758-201-1.
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VAŠÍČEK, Z.; SEKANINA, L. Search-based synthesis of approximate circuits implemented into FPGAs. In 26th International Conference on Field Programmable Logic and Applications. Lausanne: Institute of Electrical and Electronics Engineers, 2016. p. 1-4. ISBN: 978-2-8399-1844-2.
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GROCHOL, D.; SEKANINA, L. Evolutionary design of fast high-quality hash functions for network applications. In GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016. p. 901-908. ISBN: 978-1-4503-4206-3.
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SEKANINA, L. Introduction to Approximate Computing: Embedded Tutorial. In 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016. p. 90-95. ISBN: 978-1-5090-2467-4.
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WIGLASZ, M.; DRAHOŠOVÁ, M. Plastic Fitness Predictors Coevolved with Cartesian Programs. In 19th European Conference on Genetic programming. Lecture Notes in Computer Science. Berlin: Springer International Publishing, 2016. p. 164-179. ISBN: 978-3-319-30667-4.
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SÁNCHEZ-CLEMENTE, A.; ENTRENA, L.; HRBÁČEK, R.; SEKANINA, L. Error Mitigation using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches. IEEE TRANSACTIONS ON RELIABILITY, 2016, vol. 65, no. 4, p. 1871-1883. ISSN: 0018-9529.
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VAŠÍČEK, Z.; SEKANINA, L. Evolutionary Design of Complex Approximate Combinational Circuits. Genetic Programming and Evolvable Machines, 2016, vol. 17, no. 2, p. 169-192. ISSN: 1389-2576.
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GROCHOL, D.; SEKANINA, L.; KOŘENEK, J.; ŽÁDNÍK, M.; KOŠAŘ, V. Evolutionary Circuit Design for Fast FPGA-Based Classification of Network Application Protocols. APPLIED SOFT COMPUTING, 2016, vol. 38, no. 1, p. 933-941. ISSN: 1568-4946.
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BIDLO, M. Investigation of Replicating Tiles in Cellular Automata Designed by Evolution Using Conditionally Matching Rules. In 2015 IEEE International Conference on Evolvable Systems (ICES). Proceedings of the 2015 IEEE Symposium Series on Computational Intelligence (SSCI). Cape Town: IEEE Computational Intelligence Society, 2015. p. 1506-1513. ISBN: 978-1-4799-7560-0.
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DOBAI, R.; KOŘENEK, J. Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications. In 2015 IEEE Symposium Series on Computational Intelligence. Cape Town: Institute of Electrical and Electronics Engineers, 2015. p. 1214-1219. ISBN: 978-1-4799-7560-0.
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MRÁZEK, V.; VAŠÍČEK, Z.; SEKANINA, L. Evolutionary Approximation of Software for Embedded Systems: Median Function. In GECCO Companion '15 Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. ACM. New York: Association for Computing Machinery, 2015. p. 795-801. ISBN: 978-1-4503-3488-4.
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MRÁZEK, V.; VAŠÍČEK, Z. Automatic Design of Low-Power VLSI Circuits: Accurate and Approximate Multipliers. In Proceedings of 13th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing. Porto: Institute of Electrical and Electronics Engineers, 2015. p. 106-113. ISBN: 978-1-4673-8299-1.
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BIDLO, M. On Routine Evolution of New Replicating Structures in Cellular Automata. In 7th International Conference on Evolutionary Computationa Theory and Applications. 7th International Joint Conference on Computational Intelligence. Lisbon: SciTePress - Science and Technology Publications, 2015. p. 28-38. ISBN: 978-989-758-157-1.
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HRBÁČEK, R. Parallel Multi-Objective Evolutionary Design of Approximate Circuits. In GECCO '15 Proceedings of the 2015 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2015. p. 687-694. ISBN: 978-1-4503-3472-3.
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Responsibility: Sekanina Lukáš, prof. Ing., Ph.D.