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Project detail
Duration: 01.07.2019 — 30.06.2022
Funding resources
Ministerstvo vnitra ČR - Program bezpečnostního výzkumu ČR v letech 2015-2022 (BV III/1-VS)
- whole funder (2019-06-26 - 2022-06-30)
On the project
Description in EnglishThe project deals with modular cryptographic systems for high-speec data networks implemented on programmable network devices. High-level language P4 for description of network data processing is used to ac1ieve modular behavior. Hardware acceleration is made accessible to broad group of IT specialists with no knowledge of FPGA technology and hardware description languages. lt significantly speeds up the process of design and flawless implementation of the syslem to a production environment.
Key words in Englishhigh-speed networks, modularity, FPGA, Cryptography:encryption, authentication, hardware acceleration
Mark
Modulární hardwarový akcelerátor pro kryptografické operace
Default language
Czech
People responsible
Hajný Jan, prof. Ing., Ph.D. - fellow researcherMalina Lukáš, doc. Ing., Ph.D. - fellow researcherVrba Kamil, prof. Ing., CSc. - principal person responsible
Units
Department of Telecommunications- beneficiary (2018-09-20 - not assigned)
Results
MALINA, L.; RICCI, S.; DZURENDA, P.; SMÉKAL, D.; HAJNÝ, J.; GERLICH, T. Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms. In Innovative Security Solutions for Information Technology and Communications. Lecture Notes in Computer Science. Springer, Cham, 2020. p. 109-124. ISBN: 978-3-030-41025-4. ISSN: 0302-9743.Detail
CÍBIK P. Cryptographic externs support in P4_16/VHDL compiler for FPGA board target platform. Proceedings of the 26th Conference STUDENT EEICT 2020. Brno: 2020. p. 168-171. ISBN: 978-80-214-5867-3.Detail
MALINA, L.; SMÉKAL, D.; RICCI, S.; HAJNÝ, J.; CÍBIK, P.; HRABOVSKÝ, J. Hardware-Accelerated Cryptography for Software-Defined Networks with P4. In Innovative Security Solutions for Information Technology and Communications. Lecture Notes in Computer Science. Springer, 2021. p. 271-287. ISSN: 0302-9743.Detail
CÍBIK P. Hardware-Accelerated Cryptography for Software-Defined Networks. In Proceedings of the 27th Conference STUDENT EEICT 2021 selected papers. 1. Brno: Brno University of Technology, Faculty of Electrical Engineering and Communication, 2021. p. 126-130. ISBN: 978-80-214-5943-4.Detail
RICCI, S.; MALINA, L.; JEDLIČKA, P.; SMÉKAL, D.; HAJNÝ, J.; CÍBIK, P.; DZURENDA, P.; DOBIÁŠ, P. Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. In ARES 2021: The 16th International Conference on Availability, Reliability and Security. 2021. p. 1-10. ISBN: 978-1-4503-9051-4.Detail
MALINA, L.; CÍBIK, P.; JEDLIČKA, P.; SMÉKAL, D.; RICCI, S.; HRABOVSKÝ, J. Hardware-based Cryptographic Accelerator for Post Quantum Era. In 13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT). 2021. p. 149-155. ISBN: 978-1-6654-0219-4.Detail
CÍBIK, P.; HAJNÝ, J. Secure Communication Between High-speed Network Gateways. In Proceedings of the 28th Conference STUDENT EEICT 2022 Selected Papers. 1. Brno: Brno University of Technology, Faculty of Electronic Engineering and Technology, 2022. p. 303-307. ISBN: 978-80-214-6030-0.Detail
SMÉKAL, D.; JEDLIČKA, P.; MALINA, L.; ŠEDA, P.; DOBIÁŠ, P.; VRBA, K.; CÍBIK, P.; HRABOVSKÝ, J.: CRYPTOACCEL; Knihovna kryptografických primitiv pro platformu FPGA jako externů jazyka P4 (Hardwarový kryptografický demonstrátor). Ústav telekomunikací, FEKT. URL: https://axe.vut.cz/publications-downloads/. (software)Detail