Publication detail

Normalized Testability Measures Based on RTL Digital Circuit Graph Model Analysis

STRNADEL, J.

Original Title

Normalized Testability Measures Based on RTL Digital Circuit Graph Model Analysis

Type

article in a collection out of WoS and Scopus

Language

English

Original Abstract

The paper presents measures for testability valuation of a digital circuit at register-transfer level (RT level, RTL). Definition of a graph model of a RTL digital circuit for these purposes and mathematical formulas of measures for testability valuation based on analysis of proposed graph model are presented in this paper. Finally, experimental results are presented.

Keywords

Register transfer level, digital circuit graph model, testability analysis measures

Authors

STRNADEL, J.

Released

1. 9. 2002

Publisher

The University of Technology Košice

Location

Košice

ISBN

80-7099-879-2

Book

Proceedings of The fifth International Scientific Conference Electronic Computers and Informatics 2002

Edition

Edition 55

Pages from

200

Pages to

205

Pages count

6

URL

https://www.fit.vut.cz/research/publication/6995/

BibTex

@inproceedings{BUT10247,
  author="Josef {Strnadel}",
  title="Normalized Testability Measures Based on RTL Digital Circuit Graph Model Analysis",
  booktitle="Proceedings of The fifth International Scientific Conference Electronic Computers and Informatics 2002",
  year="2002",
  series="Edition 55",
  pages="200--205",
  publisher="The University of Technology Košice",
  address="Košice",
  isbn="80-7099-879-2",
  url="https://www.fit.vut.cz/research/publication/6995/"
}

Documents

2002-eci.pdf