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ŠČUGLÍK, F.
Original Title
Visualizing formal specifications using diagrams
Type
article in a collection out of WoS and Scopus
Language
English
Original Abstract
Although the verification process of formal models represent a long-time procedure, it is applied on more and more systems because finding and eliminating of consequent error stands for high costs. This contribution develops a front-end interface for system developers which provides automatically generation of system's formal models utilizing the algebra of Communicating Sequential Processes. The discussed tool stem from UML composite states diagrams and utilizes behavioral diagrams to specify the systems. The paper includes the used subset of CSP and the developed technique for automated model specification.
Keywords
Formal specification, UML, Digram, Process, behavior
Authors
RIV year
2003
Released
7. 10. 2003
Publisher
Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture , University of Split
Location
Split
ISBN
953-6114-64-X
Book
11. International Conference on Software, Telecommunications & Computer Networks
Pages from
165
Pages to
169
Pages count
5
BibTex
@inproceedings{BUT10901, author="František {Ščuglík}", title="Visualizing formal specifications using diagrams", booktitle="11. International Conference on Software, Telecommunications & Computer Networks", year="2003", pages="165--169", publisher="Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture , University of Split", address="Split", isbn="953-6114-64-X" }