Detail publikace

Visualizing formal specifications using diagrams

ŠČUGLÍK, F.

Originální název

Visualizing formal specifications using diagrams

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

Although the verification process of formal models represent a long-time procedure, it is applied on more and more systems because finding and eliminating of consequent error stands for high costs. This contribution develops a front-end interface for system developers which provides automatically generation of system's formal models utilizing the algebra of Communicating Sequential Processes. The discussed tool stem from UML composite states diagrams and utilizes behavioral diagrams to specify the systems. The paper includes the used subset of CSP and the developed technique for automated model specification.

Klíčová slova

Formal specification, UML, Digram, Process, behavior

Autoři

ŠČUGLÍK, F.

Rok RIV

2003

Vydáno

7. 10. 2003

Nakladatel

Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture , University of Split

Místo

Split

ISBN

953-6114-64-X

Kniha

11. International Conference on Software, Telecommunications & Computer Networks

Strany od

165

Strany do

169

Strany počet

5

BibTex

@inproceedings{BUT10901,
  author="František {Ščuglík}",
  title="Visualizing formal specifications using diagrams",
  booktitle="11. International Conference on Software, Telecommunications & Computer Networks",
  year="2003",
  pages="165--169",
  publisher="Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture , University of Split",
  address="Split",
  isbn="953-6114-64-X"
}