Publication detail

CMOS Circuits Fault Simulation

RECMAN, M.

Original Title

CMOS Circuits Fault Simulation

Type

conference paper

Language

English

Original Abstract

The testibility of failures modeled by bridges and opens in CMOS operational amplifier is investigated. The functional (voltage of the output node) and current (supply current) effects caused by these types of failures in the circuit under test are presented. The correlated statistical models of individual MOS devices are used for fault simulatin. The proper number of Monte Carlo runs simulates technological spreads in output voltage and supply current. The scatter plots of these electrical variables then give the first information on fault detectibility using functional, supply current or combined technique.

Keywords

fault simulation, testing, diagnosis, CMOS analog circuits, fault modeling, circuit simulation

Authors

RECMAN, M.

RIV year

2003

Released

1. 1. 2003

Publisher

Novotný-Brno

Location

Brno

ISBN

80-214-2461-3

Book

Proceedings of the Socrates Workshop 2003

Pages from

129

Pages to

135

Pages count

7

BibTex

@inproceedings{BUT9407,
  author="Milan {Recman}",
  title="CMOS Circuits Fault Simulation",
  booktitle="Proceedings of the Socrates Workshop 2003",
  year="2003",
  pages="7",
  publisher="Novotný-Brno",
  address="Brno",
  isbn="80-214-2461-3"
}